DDR Receiver Enable Cycle Training via Data Strobe Sampling
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Solution Overview
Problem
Current methods for training receiver enable cycles in DDR memory systems are inefficient and unreliable due to reliance on simple data patterns and estimated RxEn seeds, which fail to account for signaling effects like data strobe jitter, leading to incorrect RxEn settings and corrupted data transfers.
Innovation Solution
A method that involves sampling the data strobe signal for multiple memory cycles to determine the receiver enable phase, performing memory write and read cycles at a selected memory clock frequency, and training the read data strobe cycle at a one-quarter memory clock periodic offset from the optimal receiver enable delay phase to accurately determine the correct receiver enable delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If BIOS trains receiver enable delay by comparing memory write and read cycles, then training can be performed without hardware phase recovery engine, but training is very time consuming and cannot adequately compensate for signaling effects such as data strobe jitter
Solution Approach 1:
The patent performs preliminary sampling of the data strobe signal over multiple memory cycles to determine the receiver enable phase before actual training. This preliminary action establishes an accurate reference phase that accounts for signaling effects like jitter, enabling faster subsequent training without requiring a hardware phase recovery engine.
Solution Approach 2:
The patent replaces the mechanical hardware phase recovery engine with a software-based approach that uses sampled data strobe signals to determine receiver enable phase. This substitution maintains training accuracy while reducing hardware complexity and enabling more flexible implementation.
2Measurement precision
If hardware phase recovery engine samples signal phase over multiple data strobe pulses, then training accuracy improves, but system requires accurate estimate of actual RxEn cycle and phase delay (RxEn seed) within one-half memory clock range
Solution Approach 1:
The patent makes the training system self-service by using the actual data strobe signal itself to determine the receiver enable phase, rather than requiring an external RxEn seed estimate. The data strobe signal contains the necessary phase information, and the system extracts it through sampling and analysis, eliminating the need for separate seed estimation hardware or algorithms.
Solution Approach 2:
The patent introduces the sampled data strobe signal as an intermediary between the memory system and the training algorithm. By sampling the data strobe signal over multiple cycles, the system obtains an accurate representation of the actual phase and timing characteristics, which then serves as the basis for determining the receiver enable phase without requiring direct seed estimation.
3Reliability
If RxEn seed is outside required range, then training aliases to incorrect RxEn cycle, but providing accurate RxEn seed estimate increases system complexity
Solution Approach 1:
The patent employs periodic sampling of the data strobe signal over multiple memory cycles to capture the periodic nature of the data strobe pulses. By sampling across multiple periods, the system can accurately determine the phase relationship without being affected by periodic aliasing, ensuring reliable training regardless of initial seed estimates.
Solution Approach 2:
The patent implements feedback by using the sampled data strobe signal to continuously refine the receiver enable phase determination. The system monitors the actual signal characteristics and adjusts the phase calculation accordingly, providing feedback that ensures accurate training even when initial estimates are outside the traditional required range.
4Manufacturing precision
If training is performed at optimal receiver enable delay phase, then data transfer accuracy is maximized, but training does not account for variances in hardware such as processor die, processor packages, memory bus layout
Solution Approach 1:
The patent changes the approach from using fixed optimal delay values to dynamically determining the receiver enable phase based on actual sampled data strobe signals. By measuring the actual phase and timing characteristics of the data strobe signal in the specific hardware configuration, the system adapts to variations in processor die, packages, and memory bus layout while maintaining accurate data transfer.
Solution Approach 2:
The patent applies local quality by determining the receiver enable phase specific to each hardware configuration rather than using a universal optimal value. The sampling process captures the local characteristics of the data strobe signal in the specific system, allowing the training to be optimized for that particular hardware instance with its unique propagation times and signal characteristics.
Data Source
AI summary
A method is provided for sampling a data strobe signal of a memory cycle and determining a receiver enable phase based upon the data strobe signal. The method also includes performing a memory write cycle and a subsequent read cycle and training a read data strobe cycle at a one-quarter memory clock periodic offset. The method also includes determining a correct receiver enable delay in response to a successful read data strobe training cycle. Computer readable storage media are also provided. An apparatus is provided that includes a communication interface portion that is coupled to a memory portion and to a processing device. The apparatus also includes a first circuit portion, coupled to the communication interface portion. The first circuit portion monitors memory cycles on the communication interface portion, determines a receiver enable cycle phase and train a receiver enable cycle without using receiver enable seed.