DDR Signal Phase Alignment to Reduce SSN

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Solution Overview

Problem

Current methods for reducing simultaneous switching noise (SSN) in DDR interfaces are ineffective, as they either do not significantly decrease noise or complicate board design and signal transmission.

Innovation Solution

A signal processing method that determines the phase status of data synchronization signals and to-be-sent data signals, performing phase change processing such as polarity reversal on these signals to reduce coupling crosstalk and SSN, without increasing design complexity or affecting signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If inductive coupling crosstalk between signals is suppressed by decreasing I/O drive current, then SSN is reduced, but signal edge rate is affected and signal sequence is delayed

Engineering Contradiction:
ImproveSSNVSAvoidsignal edge rate
Core Design Contradiction:
Object-affected harmful factorsVSSpeed

Solution Approach 1:

The patent changes the phase parameter of data signals dynamically. By detecting phase differences between data signals and reference signals, the system performs polarity reversal on specific data signals to align their phases, thereby reducing inductive coupling crosstalk and SSN without decreasing I/O drive current, thus maintaining signal edge rate and sequence integrity

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If power source and ground pins of chip are increased to reduce SSN, then SSN is decreased, but board design and production difficulty increases

Engineering Contradiction:
ImproveSSNVSAvoidboard design complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

Instead of increasing physical pins, the patent changes the electrical phase parameter of signals through detection and polarity reversal operations. This software-controlled phase alignment approach reduces SSN without adding physical components or complicating board design and production

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If I/O quantity is increased to reduce SSN, then SSN is decreased, but device complexity and design difficulty increases

Engineering Contradiction:
ImproveSSNVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent uses phase parameter modification through polarity reversal on existing I/O lines rather than increasing I/O quantity. By detecting phase differences and performing conditional polarity reversal, the system reduces SSN using the same physical I/O resources, avoiding increased device complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9172527B2Signal processing method and apparatus
Publication Date: 2015.10.27 HUAWEI TECH CO LTD
  • US9172527B2 patent drawing
  • US9172527B2 patent drawing
  • US9172527B2 patent drawing

AI summary

A signal processing method and apparatus. According to the signal processing method, phase change processing can be performed on to-be-sent data signals according to a phase status of a data synchronization signal and phase statuses of the to-be-sent data signals, so that phase differences between a majority of to-be-sent data signals in the processed to-be-sent data signals and the data synchronization signal meet a certain condition, thereby reducing a volume of coupling crosstalk, generated by the to-be-sent data signals, on the data synchronization signal and further reducing impact of simultaneously switching noise (SSN) on a system.