DDR Storage Adapter Virtual Address Mapping
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Solution Overview
Problem
Modern storage technologies, such as SSDs and HDDs, face latency issues due to the overhead of legacy storage software stacks, making them incompatible with Double Data Rate (DDR) specifications, which limits their performance as persistent memory.
Innovation Solution
A method is introduced to access persistent memory over a DDR-compliant interface by allocating virtual address ranges, generating page faults, and mapping page table entries to physical pages in a memory buffer, allowing data transfer between persistent memory and the buffer without relying on legacy storage software stacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If modern storage technologies (SSDs, HDDs) are used with legacy storage software stacks, then storage capacity and persistence are improved, but access latency increases significantly making them incompatible with DDR specifications
Solution Approach 1:
The patent introduces a memory buffer as an intermediary component between the persistent memory device and the host system. This buffer acts as a mediator that decouples the slow persistent memory from the fast DDR interface, allowing the host to access data at DDR speeds while the persistent memory operates at its native slower speed. The buffer absorbs the latency difference, enabling persistent memory to appear as fast memory to the host system.
Solution Approach 2:
The patent segments the memory access path into distinct components: host buffer, memory buffer, and persistent memory. By dividing the access path, the system can optimize each segment independently - the host buffer handles fast DDR transactions, the memory buffer manages data transfer and caching, and the persistent memory provides reliable storage. This segmentation allows the system to achieve both high speed and reliability.
2Adaptability or versatility
If legacy storage software stacks are used with modern storage technologies, then storage device functionality is maintained, but performance is penalized due to software overhead
Solution Approach 1:
The patent extracts the software stack overhead by implementing a hardware-based memory interface that operates independently of the storage software stack. The memory buffer and controller handle data transfer and management at the hardware level, bypassing the need for software intervention. This extraction removes the performance penalty while maintaining compatibility through standard memory interfaces.
Solution Approach 2:
The patent creates a universal interface that allows persistent memory devices to function through standard memory interfaces rather than requiring proprietary storage protocols. The memory buffer implements standard DDR-compatible interfaces, enabling the persistent memory to be accessed by any host system using conventional memory access methods, thus achieving both compatibility and high performance.
3Speed
If persistent memory devices are directly connected to DDR interface, then access speed is improved, but interface compatibility is lost due to latency mismatches
Solution Approach 1:
The memory buffer serves as an intermediary that translates between the slow persistent memory interface and the fast DDR interface. It accepts data from persistent memory at its native speed and serves data to the host at full DDR speeds, effectively hiding the speed mismatch. This allows the system to achieve both high speed compatibility and persistent memory performance.
4Productivity
If virtual address ranges are mapped to physical pages in memory buffer, then data access efficiency is improved, but memory buffer management complexity increases
Solution Approach 1:
The patent implements self-service mechanisms where the memory buffer automatically manages its own caching and data transfer operations. The buffer controller monitors buffer status, initiates data transfers between host buffer and persistent memory, and manages page faults without requiring complex external control logic. This automation reduces the effective complexity while maintaining high access efficiency.
Data Source
AI summary
A method of accessing a persistent memory over a memory interface is disclosed. In one embodiment, the method includes allocating a virtual address range comprising virtual memory pages to be associated with physical pages of a memory buffer and marking each page table entry associated with the virtual address range as not having a corresponding one of the physical pages of the memory buffer. The method further includes generating a page fault when one or more of the virtual memory pages within the virtual address range is accessed and mapping page table entries of the virtual memory pages to the physical pages of the memory buffer. The method further includes transferring data between a physical page of the persistent memory and one of the physical pages of the memory buffer mapped to a corresponding one of the virtual memory pages.