DDR4 Memory ECC Reordering for DBI Byte Inversion Errors

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Solution Overview

Problem

Current error correction methods in DDR4 memory systems, specifically the Hamming function with parity used in SECDED ECC, are unable to reliably detect or correct consecutive 8-bit errors resulting from signal integrity events on the DBI signal, which can lead to accidental bit inversions during data transmission.

Innovation Solution

The error correcting code calculation is reordered to be performed on each of the 8 beats of a burst of data, ensuring no more than one bit per byte is included in each ECC calculation, allowing for the detection and correction of multi-bit errors, including complete byte inversion, while maintaining normal correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SECDED ECC algorithms are used to protect data bits from errors, then single-bit errors can be corrected and double-bit errors can be detected, but consecutive 8-bit errors resulting from DBI signal integrity events cannot be reliably detected or corrected

Engineering Contradiction:
Improveerror detection and correction capabilityVSAvoidability to handle multi-bit errors
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the 8 beats of a burst into separate ECC calculation groups, where each group contains at most one bit from each byte. This segmentation transforms the problem from handling 8 simultaneous errors in one ECC calculation to handling at most one error per ECC calculation across 8 separate calculations, enabling reliable detection and correction of DBI signal integrity events

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the dimension of ECC calculation from processing all 8 beats simultaneously in a single ECC operation to processing beats sequentially across multiple ECC operations. By distributing error checking across the time dimension of 8 separate ECC calculations, the system can identify patterns characteristic of DBI errors (where all 8 beats show errors in the same byte position) while maintaining SECDED capabilities for random errors

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If DBI signal is used to reduce power and improve signal integrity, then power consumption is reduced and signal integrity is improved, but the DBI bit itself may experience signal integrity events leading to accidental inversion of transmitted data bits

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transmission accuracy
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the results of 8 sequential ECC calculations are analyzed to detect patterns indicating DBI signal integrity events. When errors are detected in the same byte position across multiple beats, the system generates a correction signal that inverts the affected byte, effectively compensating for DBI inversion errors and maintaining data transmission accuracy

Inventive Principle:
Principle #23Feedback

3Ease of operation

If ECC calculation is performed on all 8 beats with traditional Hamming function, then normal single-bit errors can be corrected, but multi-bit errors including complete byte inversion cannot be detected or corrected

Engineering Contradiction:
Improvenormal error correctionVSAvoidmulti-bit error detection and correction
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent segments the ECC calculation process into 8 separate operations, each handling one beat of the burst. By ensuring that each ECC calculation involves at most one bit from each byte across the 8 beats, the system maintains the simplicity and effectiveness of Hamming code for single-bit errors while gaining the ability to detect and correct multi-bit errors through pattern recognition across the segmented calculations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the results of 8 separate ECC calculations to detect patterns characteristic of DBI errors. By combining information from all 8 beats and identifying consistent error patterns in the same byte position, the system can correct complete byte inversions while preserving the ease of operation of traditional ECC methods for normal error conditions

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9703625B1Method and apparatus for detecting or correcting multi-bit errors in computer memory systems
Publication Date: 2017.07.11 CADENCE DESIGN SYST INC
  • US9703625B1 patent drawing
  • US9703625B1 patent drawing
  • US9703625B1 patent drawing

AI summary

A method for detecting a data bit inversion (DBI) error in a memory system is disclosed. The method and system comprise calculating an error correcting code (ECC) from each of the 8 beats of a burst of data such that no more than one bit per byte is included in each ECC calculation. The method and system further include determining if there is an inversion of one byte in the burst.