DDR4 Memory Short Protection Circuit
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Solution Overview
Problem
The introduction of a short across pins in DDR4 DIMM memory device connectors connected to high voltage rails can cause detrimental failures in memory devices, motherboards, and other components due to improper seating during assembly, shipping, or user replacement.
Innovation Solution
A memory short protection system that includes a power supply system with a first power rail, a processing system, and a memory system with a memory device connector configured to detect shorts using a short detection circuit. This circuit compares voltages from the first power rail to a predetermined short detection voltage and prevents power from being provided to the memory device connector if a short is detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If DDR4 DIMM memory devices utilize pins connected to high voltage rails (12V) in the memory device connector, then the memory system can provide higher power to memory devices, but the risk of causing detrimental failures due to improper seating increases
Solution Approach 1:
The short detection circuit performs voltage comparison before full power is applied to the memory device connector. By detecting shorts in advance during the initialization phase and preventing power delivery only when shorts are detected, the system enables high voltage rail operation while mitigating short circuit risks from improper seating
Solution Approach 2:
The short detection circuit acts as an intermediary between the high voltage power rail and the memory device connector. It monitors the voltage conditions and controls power delivery through this intermediate layer, allowing the system to safely operate high voltage rails while protecting against shorts
2Reliability
If a short detection circuit is implemented to prevent power delivery when shorts are detected, then component protection is improved, but the system complexity increases
Solution Approach 1:
The patent replaces complex mechanical interlocking mechanisms with an electrical detection approach. Instead of using mechanical features to ensure proper seating, the system uses voltage comparison circuits to detect improper seating conditions, reducing mechanical complexity while maintaining reliability
Solution Approach 2:
The short detection circuit automatically monitors itself and the connector condition without requiring external intervention. The circuit self-regulates power delivery based on detected conditions, eliminating the need for additional control systems or manual checking procedures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively prevents power from being supplied to the memory device connector when a short is detected, thereby protecting the memory device and other components from potential damage due to improper seating or other scenarios.
Implementation Method 1
compare the first voltage to a first short detection voltage; determine whether a short exists across the first pin and the second pin based on the comparing of the first voltage to the first short detection voltage
Data Source
AI summary
Memory short detection systems and methods include a power supply system with first power rail. A memory system includes a memory device connector that is configured to couple to a memory device and includes a first pin that is coupled to the first power rail and a second pin located adjacent the first pin. A short detection circuit is coupled to the first pin. The short detection circuit is configured to provide a first voltage from the first power rail, compare the first voltage to a first short detection voltage, and determine whether a short exists across the first pin and the second pin based on the comparing of the first voltage to the first short detection voltage. If a short is determined to exist across the first pin and the second pin, power is prevented from being provided to the memory device connector.