DDS Bit Reduction with Dithered Rounding to Suppress Spurs

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Solution Overview

Problem

Existing digital signal processing technologies fail to effectively suppress the occurrence of unnecessary frequency components (spurious) when reducing the bit number of digital signals generated by Direct Digital Synthesizers, leading to deterioration in device characteristics and increased noise during analog conversion.

Innovation Solution

A digital signal processing device that adds noise data to the digital signal before reducing the bit number, employing a fraction processing method where the most significant bit is rounded down to 0 and up to 1, effectively suppressing spurious components in the frequency signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If bit number reduction processing is performed on digital signal from DDS, then the signal can be processed by D/A conversion circuit with limited bit capacity, but spurious frequency components occur and device characteristics deteriorate

Engineering Contradiction:
Improvecompatibility with D/A conversion circuitVSAvoidsignal quality
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The invention applies preliminary dithering (adding random noise) to the digital signal before bit number reduction processing. This preliminary action randomizes quantization errors, preventing the generation of spurious frequency components during the subsequent bit reduction and D/A conversion process, thereby maintaining signal quality while achieving compatibility with limited-bit D/A circuits

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention converts the harmful quantization errors that normally occur during bit number reduction into beneficial random noise through dithering. By adding random noise before reduction, the quantization errors become stochastic rather than systematic, transforming what would be harmful spurious components into acceptable noise floor that does not degrade signal quality

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Device complexity

If conventional bit number reduction is applied, then processing complexity is reduced, but spurious components are generated that cause characteristic deterioration

Engineering Contradiction:
Improveprocessing complexityVSAvoidspurious frequency component
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The invention converts the harmful quantization errors that normally occur during bit number reduction into beneficial random noise through dithering. By adding random noise before reduction, the quantization errors become stochastic rather than systematic, transforming what would be harmful spurious components into acceptable noise floor that does not degrade signal quality

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The invention changes the statistical parameters of the quantization error by adding random dither noise with specific amplitude and distribution characteristics. This parameter change transforms the error distribution from deterministic (causing spurs) to probabilistic (creating acceptable noise), thereby eliminating harmful frequency components while maintaining processing simplicity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8125363B2Digital signal processing device
Publication Date: 2012.02.28 NIHON DEMPA KOGYO CO LTD
  • US8125363B2 patent drawing
  • US8125363B2 patent drawing
  • US8125363B2 patent drawing

AI summary

There is provided a digital signal processing device capable of suppressing occurrence of an unnecessary frequency component (spurious) in performing a reduction processing of a bit number of a frequency signal made of a digital signal. A signal output section 10 outputs a frequency signal by a digital signal made of bit data and an addition section 16 adds noise data for suppressing occurrence of an unnecessary frequency component to the bit data. A reduction processing section 11 performs a predetermined processing in correspondence with whether the bit data obtained in the addition section 16 is positive or negative, and thereafter, shifts each bit of the bit data to the right by m digits set in advance (m is an integer smaller than a bit number of the bit data) and cut off an m-bit portion to reduce the number, rounding down “0” and rounding up “1” for the most significant bit of the bits having been cut off.