DDS Frequency Generator Avoiding Crossing Spurs
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Solution Overview
Problem
Existing frequency generators, particularly direct digital synthesizers (DDS), face challenges in maintaining low noise performance and avoiding spurious signals, especially when varying frequencies over a wide range, due to issues like phase truncation spurs and crossing spurs.
Innovation Solution
A device comprising a direct digital synthesizer (DDS) configured to receive a variable sampling clock signal and a programmable value, along with a controller that selects these parameters to avoid spurs in the frequency spectrum, combined with a programmable frequency divider and mixer structure to generate and manipulate local oscillator signals, ensuring reduced spurious performance across a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the DDS output frequency is varied over a wide frequency range, then the frequency coverage is improved, but crossing spurs appear in the frequency spectrum
Solution Approach 1:
The patent applies dynamics by making the sampling clock frequency variable rather than fixed. The controller dynamically adjusts the sampling clock frequency based on the desired DDS output frequency to ensure that spurs are pushed outside the band of interest. This dynamic adjustment allows the system to maintain low spurious performance across a wide frequency range while preserving frequency coverage.
2Device complexity
If the sampling clock frequency is kept fixed, then the system complexity is reduced, but the ability to avoid crossing spurs is limited
Solution Approach 1:
The patent applies parameter changes by varying the sampling clock frequency parameter based on the desired output frequency. The controller calculates the appropriate sampling clock frequency to push spurs outside the band of interest. This parameter adjustment approach resolves the contradiction by maintaining low spurious performance across a wide frequency range without requiring complex additional hardware.
3Stability of the object's composition
If frequency division is used to generate the sampling clock, then the frequency stability is improved, but the frequency range coverage is reduced
Solution Approach 1:
The patent applies dynamics by using a programmable frequency divider that can be dynamically configured with different division ratios. The controller selects appropriate division ratios based on the desired output frequency range, allowing the system to maintain frequency stability through division while simultaneously achieving wide frequency range coverage by changing the division factor as needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the DDS to produce a variable frequency output with reduced noise and spurious signals, allowing for continuous frequency coverage over several octaves while maintaining low spurious levels, suitable for applications like spectrum analyzers.
Implementation Method 1
a direct digital synthesizer (DDS) configured to receive a sampling clock signal having a variable sampling clock frequency and further configured to receive a programmable value, and in response thereto to output a DDS output signal having a DDS output frequency that is a function of the sampling clock frequency and the programmable value
Implementation Method 2
a first intermediate frequency (IF) mixer configured to mix the input signal and the first LO signal to produce a first IF signal
Implementation Method 3
a first programmable frequency divider configured to receive the second LO signal and to divide the second LO frequency by a first programmable frequency divider value to produce a first reference signal having a first reference frequency
Data Source
AI summary
A signal processor includes a frequency generator that employs a direct digital synthesizer (DDS) to generate a first local oscillator (LO) signal with a variable first LO frequency. The signal processor also includes an oscillator generating a second LO signal having a second LO frequency. The DDS employs programmable frequency control word and a sampling clock signal having a variable sampling clock frequency that is derived from the second LO frequency, to generate a DDS output signal from which the first LO signal is produced. The variable sampling clock frequency and the programmable frequency control word are selected to avoid crossing spurs in the frequency spectrum of the DDS output signal.


