Direct Digital Synthesizer Feedback Locking to an Input Signal
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Solution Overview
Problem
Digital waveform synthesizers lack an efficient method to lock the phase and frequency of their output signals to an externally generated input signal, limiting their ability to produce synchronized waveforms.
Innovation Solution
A method and apparatus that adjust the frequency control digital word progressively until the synthesised output signal is phase-locked with the input signal, using a direct digital frequency synthesizer and a control circuit to alter the frequency control digital word based on comparisons between the synthesised output signal and the input signal, allowing for phase and frequency synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a direct digital frequency synthesizer is used to produce selectable frequency output signals, then frequency versatility and ease of frequency selection are improved, but the ability to lock the output signal phase and frequency to an externally generated input signal deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the output signal of the direct digital frequency synthesizer is fed back to a comparator that compares its phase and frequency with the input signal. The comparator generates error signals that are used to adjust the frequency control digital word, creating a closed-loop system that automatically locks the output signal to the input signal while maintaining frequency versatility
Solution Approach 2:
The patent replaces traditional mechanical phase-locked loop components with a digital implementation using a direct digital frequency synthesizer, digital comparator, and programmable frequency control. This digital substitution maintains the locking functionality while enabling greater frequency versatility and ease of control through digital word manipulation
2Reliability
If the frequency control digital word is progressively altered to achieve phase locking, then phase and frequency synchronization is improved, but the time required to achieve locking increases
Solution Approach 1:
The patent implements a dynamic adjustment mechanism where the frequency control digital word is modified progressively based on real-time phase and frequency error detection. The system adapts the rate and magnitude of adjustments during the locking process, allowing for both rapid initial acquisition and precise final synchronization
Solution Approach 2:
The system performs preliminary frequency estimation and coarse adjustment before fine-tuning the phase lock, reducing the overall time to achieve locking by preparing the frequency control digital word in stages rather than requiring gradual adjustment from an unknown starting point
Data Source
AI summary
A digital waveform synthesiser (1) is implemented as a single chip integrated circuit on a single chip (2) and comprises a direct digital synthesiser (10) which produces a synthesised output signal waveform on an output terminal (4) which is substantially phase and frequency locked to the phase and frequency of an externally generated input signal applied to an input terminal (5). A comparing circuit (20) compares the period of the synthesised output signal waveform on the output terminal (4) with the period of the input signal, and a control circuit (28) produces progressively altered values of a frequency control digital word which are sequentially applied to an accumulator (11) of the direct digital synthesiser (10) in response to the comparing circuit (20), until the value of the frequency control digital word applied to the accumulator (11) is such as to produce the synthesised output signal waveform to be substantially phase and frequency locked to the phase and frequency input signal applied to the input terminal (5).


