DDS Microwave Synthesizer for Fast Switching and Low Phase Noise
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Solution Overview
Problem
Current frequency synthesizers face challenges in achieving high-switching speed and low phase noise while maintaining low power consumption and minimal spurious signals, particularly due to the limitations of voltage-controlled oscillators (VCOs) and multi-loop configurations, which result in compromised phase noise and tuning speed.
Innovation Solution
A broadband microwave synthesizer architecture that replaces VCOs with direct-digital synthesis (DDS) and uses a stable reference frequency, frequency translation, and filtering to expand tuning signals with minimal phase noise penalty, controlled by dividers for large frequency steps and fine tuning by DDS, effectively eliminating harmonic and non-harmonic spurious signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a wideband VCO is used to achieve wide tuning range, then the tuning range is expanded, but the phase noise performance is degraded
Solution Approach 1:
The patent divides the frequency synthesis function into multiple segments: a narrowband low-noise VCO for base frequency generation, and multiple frequency multipliers (x2, x3, x4, etc.) to achieve wideband output. Each segment operates within its optimal performance range, with the VCO maintaining low phase noise and multipliers expanding the tuning range without degrading the fundamental noise characteristics.
Solution Approach 2:
The patent introduces frequency multipliers as intermediary devices between the low-noise VCO and the final output. These multipliers act as mediators that translate the narrowband low-noise signal into wideband signals while minimizing noise degradation through careful design and selection of multiplication factors.
2Adaptability or versatility
If multi-loop configurations are used to achieve wide tuning range, then the tuning range is expanded, but the circuit complexity increases and power consumption increases
Solution Approach 1:
The patent merges multiple frequency multiplication functions into a single integrated architecture. Instead of using separate loops for different frequency ranges, it combines a single VCO with multiple parallel multiplier paths (x2, x3, x4, etc.), all controlled by a unified phase-locked loop system. This reduces the number of independent control circuits and simplifies the overall structure.
Solution Approach 2:
The patent creates a universal frequency synthesis architecture where a single VCO and PLL system can generate multiple output frequencies by switching between different multiplier paths. The same core circuitry serves multiple frequency generation functions, eliminating the need for separate dedicated circuits for each frequency range.
3Adaptability or versatility
If multi-loop configurations are used to achieve wide tuning range, then the tuning range is expanded, but the switching speed is limited
Solution Approach 1:
The patent prepares multiple frequency multiplication paths in advance, with each multiplier continuously ready to accept the VCO output. When a frequency change is required, the system simply switches between pre-prepared multiplier paths rather than reconfiguring loops, enabling extremely fast switching speeds limited only by the multiplier response time and switching circuitry.
4Adaptability or versatility
If VCO tuning bandwidth is increased to achieve wide range, then the tuning range is expanded, but the phase noise at given offset is degraded by 6 dB per doubling
Solution Approach 1:
The patent creates multiple copies of the low-noise VCO signal through frequency multiplication. Each multiplier generates a scaled version of the original signal at a different frequency multiple. By maintaining the fundamental signal integrity through these copies and selecting the appropriate copy for the desired output frequency, the system achieves wide tuning range while preserving the low phase noise characteristics of the original VCO.
Data Source
AI summary
The present invention is directed to a frequency synthesizer with an improved architecture that eliminates a VCO and a method to build frequency synthesizers for generating high-frequency signals with low phase noise, low spurious, extremely fast switching speed and fine frequency resolution. The synthesizer provides significant improvement in performance, phase noise, switching speed, power, size and cost reduction.