Direct Digital Synthesizer with Phase Interpolation for MRI Signals
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Solution Overview
Problem
Direct digital synthesizers struggle to output amplitude data with a clock frequency higher than that of phase data, limiting their effectiveness in applications such as MRI systems where higher clock frequencies are required for accurate transmission and detection.
Innovation Solution
Incorporating an interpolating means to increase the clock frequency of phase data and using a waveform Look-Up Table (LUT) to generate amplitude data, while optionally employing curtailing and additional data to compensate for lost phase information, allowing for the output of amplitude data at a higher clock frequency than phase data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clock frequency of phase data is lowered for reliable transmission, then transmission reliability is improved, but the clock frequency of amplitude data cannot be raised for high-speed processing
Solution Approach 1:
The system divides the signal processing into two independent parts: phase data processing at a lower clock frequency (f1) for reliable transmission, and amplitude data processing at a higher clock frequency (f2) for high-speed output. The phase accumulator operates at f1 while the waveform LUT operates at f2, allowing each component to optimize its operating frequency independently.
Solution Approach 2:
The waveform LUT acts as an intermediary component that receives phase data at frequency f1 and outputs amplitude data at frequency f2. This mediator enables frequency conversion between the phase domain and amplitude domain, resolving the contradiction between transmission reliability and processing speed.
2Device complexity
If the clock frequency of phase data is matched with amplitude data, then system simplicity is maintained, but amplitude data cannot be outputted at higher frequency than phase data
Solution Approach 1:
The system dynamically handles frequency relationships by allowing the waveform LUT to operate at a different clock frequency (f2) than the phase accumulator (f1). This dynamic frequency separation enables the amplitude output frequency to be higher than the phase input frequency while maintaining system functionality through proper synchronization mechanisms.
Data Source
AI summary
In order to output amplitude data with the clock frequency higher than the clock frequency of phase data, the direct digital synthesizer for transmission and detection comprises: a transmitting phase for outputting a first phase data with a first clock frequency; a curtailing unit for outputting a second phase data with a second clock frequency smaller than the first clock frequency, and outputting additional data for compensating for phase information disappeared with curtailing process; an interpolating unit for outputting a third phase data with a third clock frequency larger than the first frequency by implementing interpolating process to the second phase data, and a detecting waveform for outputting amplitude data in accordance with the third phase data. The detecting signal amplitude data can be outputted with the third clock frequency higher than the second clock frequency of the second phase data transmitted.