De-loading Signal for Pixel Charging in UHD Displays
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Solution Overview
Problem
In Ultra High Definition (UHD) display apparatuses, the pixel charging time is insufficient due to the reduction in enable time periods of gate driving signals caused by parasitic capacitance, affecting display quality.
Innovation Solution
The introduction of a de-loading signal that covers the enable time period of the gate driving signal, allowing the second transistor in each pixel circuit to conduct first, thereby reducing the parasitic capacitance effect and ensuring sufficient charging time for pixel circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If UHD display requirements are implemented with Half Source driving, then definition and update rate are improved, but pixel charging time becomes insufficient due to reduced enable time periods
Solution Approach 1:
The de-loading signal is activated before the gate driving signal to preliminarily discharge the parasitic capacitance on the gate line. This preliminary action reduces the capacitive load that would otherwise extend the charging time, thereby resolving the contradiction between high definition requirements and sufficient pixel charging time.
Solution Approach 2:
The de-loading signal applies a counter-action to the parasitic capacitance effect by discharging it in advance. This preliminary anti-action neutralizes the harmful effect of the parasitic capacitance before it can interfere with the pixel charging process, enabling both UHD display quality and adequate charging time.
2Productivity
If enable time periods of gate driving signals are reduced to accommodate UHD requirements, then display update rate is improved, but parasitic capacitance effect increases
Solution Approach 1:
The de-loading signal acts as an intermediary mechanism that addresses the parasitic capacitance problem independently. By introducing this intermediate discharge signal, the system can reduce gate driving enable time periods for higher update rates without suffering from increased parasitic capacitance effects.
3Reliability
If gate driving signal enable time periods are extended to ensure complete pixel charging, then parasitic capacitance effect is reduced, but display update rate decreases
Solution Approach 1:
The charging process is segmented into two distinct phases: a preliminary discharge phase controlled by the de-loading signal, and a subsequent charging phase controlled by the gate driving signal. This segmentation allows the enable time period to be shortened while still ensuring complete pixel charging, thus maintaining both reliability and high update rate.
Data Source
AI summary
A display apparatus includes a pixel array, a plurality of gate lines and a plurality of de-load lines. The pixel array includes a plurality of display rows, each of the display rows includes a plurality of pixel circuits, and each of the pixel circuits includes a first transistor and a second transistor coupled in series between a data line and a display pixel. A control end of the first transistor of each of the pixel circuits is coupled to one of the gate lines for receiving a gate driving signal. A control end of the second transistor of each of the pixel circuits is coupled to one of the de-load lines for receiving a de-loading signal. Where an enable time period of the de-loading signal received by each of the pixel circuits covers an enable time period of the gate driving signal received by each of the pixel circuits.