DE-NMOS Switch Circuit for High-Voltage Safe Operating Area
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Solution Overview
Problem
Semiconductor switches face reliability and functionality issues when handling high voltage signals due to the asymmetry in breakdown voltages across gate and source, and gate and drain, which can lead to operating conditions outside their safe operating area.
Innovation Solution
The use of diffusion-enhanced metal-oxide-semiconductor field effect transistors (DE-MOS FETs) with graded junctions and field oxides to create a safe operating area, allowing the switches to handle high voltage signals by maintaining voltages across the gate and source below the breakdown voltage, while supporting higher voltages across the drain and gate or drain and source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MOS FETs are used to handle high voltage signals, then the voltage handling capability is limited, but the device complexity and manufacturing precision requirements increase significantly
Solution Approach 1:
The patent changes the electrical parameters of the MOS FET by introducing graded junctions with varying doping concentrations. The drain region has a graded doping profile that transitions from high concentration near the channel to lower concentration toward the substrate, which modifies the breakdown voltage characteristics and enables safe high voltage operation without increasing device complexity
Solution Approach 2:
The patent employs composite structural elements including field oxides combined with graded doped regions. The field oxide layer is positioned between the gate and the graded drain junction, creating a composite structure that provides both electrical field control and voltage breakdown protection, enabling reliable high voltage switching
2Power
If higher voltages are applied across gate and source to increase power handling, then the breakdown voltage limit is exceeded, but device damage occurs
Solution Approach 1:
The graded junction structure changes the electrical parameters by creating a gradual transition in doping concentration, which distributes the electric field more evenly and increases the breakdown voltage threshold, allowing higher power operation without exceeding damage limits
Solution Approach 2:
The field oxide structure serves as a protective cushion that prevents direct high electric field exposure to the gate-channel interface. It absorbs and distributes the electrical stress before it reaches critical components, cushioning against breakdown even when high voltages are applied
3Productivity
If asymmetric voltage distribution is used to optimize performance, then efficiency improves, but the safe operating area is reduced
Solution Approach 1:
The patent applies local quality by creating different doping concentrations at different locations within the drain region. The graded junction has high doping near the channel for good carrier injection and lower doping toward the substrate for voltage breakdown protection, optimizing both efficiency and safe operating area simultaneously
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables semiconductor switches to operate safely within their designated safe operating area, preventing functionality and reliability risks by maintaining appropriate voltage levels across the DE-MOS FETs, thus ensuring reliable high voltage operations.
Implementation Method 1
The DE-MOS FETs include graded junctions for supporting relatively high voltage signals
Implementation Method 2
a voltage source coupled to the node, where the voltage source is configured to provide a first voltage at the node, the first voltage greater than a second voltage at the input node by a predetermined amount
Data Source
AI summary
Semiconductor switches for high voltage operations are described. The semiconductor switch includes a first DE-NMOS FET including a gate coupled to a node of the switch with its source and drain coupled to input and output nodes, respectively. The switch also includes a second DE-NMOS FET with a drain coupled to the node. A gate of the second DE-NMOS FET is configured to receive a signal enabling or disabling the switch. The switch includes a voltage source (e.g., a voltage-controlled voltage source) coupled to the node, which supplies a first voltage at the node. The first voltage is greater than a second voltage at the input node by a predetermined amount such that the first DE-NMOS FET may operate within a safe operating area while supporting high voltage operations. The switch also includes a current source configured to supply current to the voltage source.


