Built-In Deadtime Test Circuit for Half-Bridge SPS Drivers
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Solution Overview
Problem
Switched power supply (SPS) circuits with half-bridge designs face inefficiencies due to cross-conduction risks and undesired power dissipation from body diodes, which are difficult to optimize for various process variations without compromising efficiency.
Innovation Solution
A built-in self-test circuit and method for determining deadtime using a feedback path that oscillates gate signals to measure propagation delays, enabling accurate determination of rise and fall time delays for switching transistors, allowing precise optimization of deadtime settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deadtime is engineered to protect against full range of process variations, then reliability is improved, but efficiency deteriorates due to unnecessarily long deadtime
Solution Approach 1:
The system performs self-measurement of propagation delays using built-in test circuitry that monitors the actual gate signal transitions. By measuring its own characteristics, the system determines the precise deadtime needed for its specific process variations, replacing conservative engineered values with actual measured values.
Solution Approach 2:
The test circuit creates a feedback path that feeds the gate signal back through comparators and logic circuitry to measure the propagation delay. This feedback mechanism allows the system to capture the actual timing characteristics and use them to optimize the deadtime setting.
2Loss of energy
If deadtime is minimized to improve efficiency, then power dissipation is reduced, but reliability deteriorates due to risk of cross-conduction
Solution Approach 1:
The system measures its own propagation delays to determine the minimum safe deadtime for its specific process variations, replacing conservative engineered values with actual measured values.
Solution Approach 2:
The system changes the deadtime parameter from a fixed engineered value to a dynamically determined value based on measured propagation delays. This allows optimization of each individual device rather than using a conservative value for all devices.
3Device complexity
If propagation delays are not measured, then device complexity is reduced, but measurement precision deteriorates
Solution Approach 1:
The system uses built-in test circuitry to perform self-measurement of propagation delays, eliminating the need for external measurement equipment and providing precise characterization of each device's timing characteristics.
Solution Approach 2:
The patent replaces manual or external measurement methods with an integrated electronic measurement system using comparators, logic gates, and feedback paths that automatically measure propagation delays through electrical signal analysis.
Data Source
AI summary
Illustrative test circuits and methods are provided for determining deadtime of a switched power supply (SPS) driver. The test circuit can be configured to couple a selected gate signal selected from a high side gate signal of a driver and a low side gate signal of the driver to an input of the driver via a feedback path that causes the selected gate signal to oscillate with a period indicative of propagation time delays of the driver from which a deadtime measurement can be determined. In some implementations, the test circuits and methods may be embodied as a built-in self-test module integrated into the controller chip for the SPS.