Parallel Deblocking Filter Buffer Timing Synchronization

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Solution Overview

Problem

The existing moving image processor technologies face challenges in efficiently transferring parallel deblocking filtering results to an external memory, particularly when multiple macroblocks are processed in parallel, leading to increased burden and inefficiency due to differing positions and operation timings of deblocking filter circuits.

Innovation Solution

A moving image processor with a data transfer unit comprising buffers that absorb the differences in positions and operation timings of deblocking filter circuits, allowing sequential transfer of filtering results from separate buffers to external memory, facilitating efficient data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If parallel deblocking filtering is performed on multiple macroblocks using multiple deblocking filter circuits, then processing speed is improved, but the complexity of transferring results to external memory increases due to differing positions and operation timings

Engineering Contradiction:
Improveprocessing speedVSAvoiddata transfer complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

A buffer is introduced as an intermediary component between the deblocking filter circuits and external memory. The buffer receives filtering results from multiple deblocking filter circuits at different times and positions, storing them temporarily before transferring to external memory. This mediator absorbs the timing and position differences, simplifying the data transfer process while maintaining parallel processing benefits.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer performs preliminary storage of filtering results before the actual transfer to external memory occurs. By pre-storing results in the buffer, the system can prepare data in advance and transfer it in a more organized manner, reducing the complexity of coordinating multiple parallel streams with external memory.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple deblocking filter circuits process macroblocks in parallel at different positions, then processing efficiency is improved, but the burden on external memory increases due to coordinated transfer requirements

Engineering Contradiction:
Improveprocessing efficiencyVSAvoiddata transfer burden
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The buffer acts as a mediator that collects filtering results from multiple deblocking filter circuits and consolidates them before transferring to external memory. This intermediary structure reduces the direct burden on external memory by providing a single, organized transfer interface rather than multiple coordinated transfers from different circuit positions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If deblocking filter circuits operate independently at different timings, then processing flexibility is improved, but the difficulty of synchronizing transfers to external memory increases

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidtransfer synchronization complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The buffer serves as a timing-absorbing intermediary that allows deblocking filter circuits to operate independently at different timings. Each circuit can complete its filtering operation and place results in the buffer at its own pace, while the buffer manages the timing differences and provides synchronized access when transferring to external memory, thus eliminating synchronization complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer performs preliminary storage of results before transfer, allowing independent operation of multiple circuits. Each circuit can complete its filtering task and deposit results in the buffer at its own timing, and the buffer prepares the consolidated data for transfer in advance, eliminating the need for complex synchronization protocols.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8483279B2Moving image parallel processor having deblocking filters
Publication Date: 2013.07.09 RENESAS ELECTRONICS CORP
  • US8483279B2 patent drawing
  • US8483279B2 patent drawing
  • US8483279B2 patent drawing

AI summary

A moving image processor includes a first and a second moving image processing unit which are able to perform parallel operation, and a data transfer unit having a first buffer and a second buffer. The first moving image processing unit processes macroblocks MB00, - - - , of one row of one image sequentially, and the second moving image processing unit processes macroblocks MB10, - - - , of the next row sequentially. The first and the second moving image processors include a first and a second deblocking filters, respectively. Operation timing of the second filter is delayed by the processing time of two macroblocks, compared with operation timing of the first filter. The processing results of the first filter and the second filter are transferred to an external memory via the first buffer and the second buffer of the transfer unit.