De-Blocking Filter Edge Order for Smaller Buffers and Fewer Stalls
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Solution Overview
Problem
The standard edge order for de-blocking filters in video codecs leads to increased storage requirements and performance bottlenecks due to the need to load and store pixels sequentially, resulting in stalls and inefficiencies in pipelined architectures, particularly in high-performance video processing engines.
Innovation Solution
A customized edge order filter operation is implemented where at least one horizontal edge is filtered before all vertical edges, with a minimum gap of one or two cycles between edges, allowing for staggered loading and storing of pixels, reducing storage needs and minimizing stalls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard defined fixed edge order is used for de-blocking filter operation, then consistency in universal decoder output is achieved, but internal pixel buffer area and power consumption increase due to sequential loading and storing requirements
Solution Approach 1:
The patent inverts the conventional filtering sequence by processing horizontal edges before vertical edges, rather than the standard vertical-then-horizontal approach. This inversion allows the filter engine to complete horizontal edge filtering and store results before beginning vertical edge filtering, enabling earlier release of buffer space and reducing peak buffer requirements while maintaining decoder output consistency
Solution Approach 2:
The patent segments the de-blocking filter operation into distinct phases: horizontal edge filtering phase followed by vertical edge filtering phase. This segmentation allows independent optimization of each phase's data flow and buffer management, enabling the buffer to be reused between phases rather than holding all data simultaneously, thus reducing overall buffer area requirements
2Reliability
If standard defined fixed edge order is used for de-blocking filter operation, then universal decoder consistency is maintained, but performance bottlenecks occur due to sequential loading and storing causing stalls in pipelined architectures
Solution Approach 1:
By inverting the filter operation order to process horizontal edges first, the patent enables the filter engine to complete one full filtering pass before transitioning to the next phase. This inversion eliminates the need for intermediate data transfers and memory stalls that occur in the standard approach, thereby improving throughput in pipelined architectures while preserving decoder consistency
Solution Approach 2:
The patent ensures continuous filtering operation by organizing the process into two continuous phases: horizontal edge filtering followed immediately by vertical edge filtering. This continuous action eliminates idle cycles and memory access stalls between loading and storing operations, maximizing the utilization of the filter engine and improving overall productivity
3Reliability
If standard defined fixed edge order is used, then decoder output consistency is achieved, but power consumption increases due to frequent memory access stalls
Solution Approach 1:
The inverted filtering order allows the filter engine to process all horizontal edges and store results before beginning vertical edge processing. This reduces the frequency of memory access operations and eliminates stalls between load and store phases, thereby reducing dynamic power consumption associated with memory interface activity while maintaining output consistency
Data Source
AI summary
A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.