Debug Circuit Byte-Level Sequence Detection
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Solution Overview
Problem
Existing debug methods for hardware face challenges in stopping hardware operations at desired conditions and time points due to constraints such as trace memory capacity and the number of signal lines, leading to inefficient debugging processes.
Innovation Solution
A debug circuit that includes a memory unit for storing code values calculated using an encoding method like CRC, a code value calculating unit for each byte of the signal sequence, a sequence detecting unit to identify the detection target sequence based on these values, and a determination unit to output a signal for stopping the hardware when the sequence is detected, allowing for precise detection and stopping of signal sequences regardless of word boundaries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a debug circuit uses traditional trace memory to monitor signal sequences, then the hardware operation can be stopped at detected sequences, but the trace memory capacity limits the ability to stop at desired conditions and time points
Solution Approach 1:
The patent divides the detection target sequence into multiple segments and uses separate detection circuits for each segment. This segmentation allows the system to detect sequences without requiring large trace memory capacity, as each segment is detected independently using code value comparisons rather than storing entire sequences.
Solution Approach 2:
The patent pre-calculates and stores code values for the detection target sequence in a detection target code value storage unit before the actual detection process. This preliminary action enables real-time comparison and detection without requiring trace memory to store the entire sequence, thus reducing memory capacity requirements while maintaining detection precision.
2Ease of operation
If a debug circuit monitors signal sequences word by word, then the detection is constrained by word boundaries, but stopping hardware at desired time points becomes difficult
Solution Approach 1:
The patent introduces a byte-based detection dimension alongside the traditional word-based processing. By calculating code values for each byte and comparing them against pre-stored detection target code values, the system can detect sequences at byte boundaries rather than being constrained to word boundaries, providing flexibility to stop hardware at any desired condition or time point.
Solution Approach 2:
The patent uses code values as an intermediary representation of the signal sequence. Instead of directly comparing raw signal sequences, the system converts sequences into code values and performs comparisons in this intermediate domain. This intermediary approach enables flexible detection at any boundary (byte or word) while maintaining efficient hardware operation.
3Measurement precision
If the debug circuit uses detailed sequence monitoring to achieve precise detection, then the circuit area and memory requirements increase
Solution Approach 1:
The patent creates a simplified copy of the detection target sequence in the form of code values and stores it in a compact detection target code value storage unit. This copying approach allows precise detection by comparing code values rather than storing and processing the entire original sequence, significantly reducing circuit area and memory requirements while maintaining detection accuracy.
Solution Approach 2:
The patent transforms the detection problem from comparing entire signal sequences to comparing code values derived from those sequences. This parameter change from sequence-level comparison to code value comparison reduces the complexity and area of the detection circuit while preserving the ability to achieve precise detection of the target sequence.
Data Source
AI summary
A memory unit stores first and second code values calculated by encoding a first sequence, contained in a first word, and a remaining second sequence of a target sequence, and the number of bytes from a word start to a target sequence start. A code value calculating unit calculates a code value for each byte, based on signal sequence. A first sequence detecting unit detects the first sequence, by comparing the first code value with a difference between the code values at the last byte of a word and at the byte corresponding to the number of bytes. An expected value calculating unit calculates an expected code value at the target sequence end, based on the code value at detection of the first sequence and the second code value. A determination unit signals that the target sequence is detected, when the code value equals the expected value.