Debug Circuit Using Standard Interface for IC Status Monitoring

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Solution Overview

Problem

Conventional integrated circuits with debugging mechanisms require expensive test equipment and dedicated I/O terminals, making it impossible to test them on production boards without additional connectors.

Innovation Solution

An integrated circuit with a debug circuit that communicates through standard interfaces like Ethernet or PCI, using a multiplexer and memory controller to transfer status signals as Ethernet packets or PCI messages, allowing remote debugging without additional I/O terminals or connectors on production boards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated I/O terminals and connectors are used for debugging, then status signals can be collected from circuits, but expensive test equipment is required and production boards cannot be tested

Engineering Contradiction:
Improvedebugging capabilityVSAvoidtest equipment and connector requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by enabling the integrated circuit to use existing standard interface connectors (such as Ethernet or PCI connectors already present on production boards) for debugging purposes, rather than requiring dedicated test connectors. This allows the same connector to serve both its original function and the additional function of status signal transmission for debugging, thereby eliminating the need for specialized test equipment and dedicated I/O terminals.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of information

If dedicated I/O terminals are wired to connectors on special test boards, then status signals can be obtained, but the setup becomes complex and cannot be used on production boards

Engineering Contradiction:
Improvestatus signal collectionVSAvoidproduction board compatibility
Core Design Contradiction:
Loss of informationVSEase of manufacture

Solution Approach 1:

The patent applies self-service by enabling the integrated circuit to autonomously transfer status signals through existing standard interfaces without requiring external test equipment or specialized connectors. The circuit uses its own existing resources (standard interface connectors already present on production boards) to perform debugging functions, making the system self-sufficient and compatible with production boards without additional manufacturing complexity.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If standard interfaces are used for debugging, then production boards can be tested and cost is reduced, but the interface must support message transfer functionality

Engineering Contradiction:
Improveinterface compatibilityVSAvoidinterface message transfer mechanism
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies the intermediary principle by introducing a debug circuit that acts as a mediator between the existing standard interface and the status signals. This debug circuit receives status signals from the integrated circuit, packages them into messages compatible with the standard interface protocol, and transfers them through the existing connector. This intermediary approach enables compatibility with standard interfaces without requiring changes to the interface hardware itself, maintaining adaptability while managing complexity through software/firmware-based message formatting.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7395454B1Integrated circuit with integrated debugging mechanism for standard interface
Publication Date: 2008.07.01 MARVELL ISRAEL (M L S L) LTD
  • US7395454B1 patent drawing
  • US7395454B1 patent drawing
  • US7395454B1 patent drawing

AI summary

A circuit having a corresponding method comprises one or more circuits each to produce one or more status signals, wherein each of the status signals represents a status of a respective one of the one or more circuits; a memory; a memory controller to store a plurality of samples of the one or more status signals in the memory; a plurality of input/output terminals; an interface in communication with one or more of the input/output terminals; and a debug circuit to transfer the one or more samples of the status signals from the memory to the interface.