Debug Context Preservation During Processor BIST Execution

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Solution Overview

Problem

Executing a built-in self-test (BIST) on processors often results in the loss of debug context information, making it difficult to properly restart the debugging process.

Innovation Solution

A system and method that saves and restores debug context information before and after executing a BIST, ensuring that the debugging process can resume without losing critical information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a built-in self-test (BIST) is executed on the processor, then the processor testing capability is improved, but the debug context information is lost

Engineering Contradiction:
Improveprocessor testing capabilityVSAvoiddebug context information
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by saving the debug context information to a destination storage location before the BIST is executed. This ensures that the context is preserved in advance, allowing the debugging process to be resumed after the test without losing critical information about the processor state, breakpoints, and watchpoints.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses an intermediary storage mechanism (destination storage location) that acts as a mediator between the processor and the debugging system. This intermediary preserves the debug context during the BIST execution, enabling the debugger to retrieve and restore the context afterward, thus maintaining the connection between the processor and debugging tools throughout the test process.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the processor is reset after BIST execution, then the processor can continue operation, but the debugging session must be restarted

Engineering Contradiction:
Improveprocessor operation continuityVSAvoiddebugging session interruption
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By saving the debug context before the BIST execution, the system prepares in advance for the upcoming reset operation. This preliminary saving action ensures that when the processor is reset after the test, the debugging session can be quickly restored without manual intervention, thereby minimizing downtime and maintaining productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements discarding and recovering by temporarily discarding the debug context during the BIST execution and reset process, then recovering it by restoring the saved context from the destination storage location. This approach allows the processor to be reset and continue operation while the debugging session is quickly recovered, minimizing the loss of time.

Inventive Principle:
Principle #34Discarding and recovering

3Productivity

If debug context is preserved during BIST execution, then debugging efficiency is improved, but additional storage and management complexity is required

Engineering Contradiction:
Improvedebugging efficiencyVSAvoidstorage and management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies taking out by extracting the debug context information from the processor and storing it in a separate destination storage location. This separation allows the context to be preserved without interfering with the BIST execution, while the additional storage requirement is minimized by only saving the essential context data needed for debugging resumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7984352B2Saving debugging contexts with periodic built-in self-test execution
Publication Date: 2011.07.19 TEXAS INSTRUMENTS INC
  • US7984352B2 patent drawing
  • US7984352B2 patent drawing
  • US7984352B2 patent drawing

AI summary

A system comprises built-in self-test (BIST) logic configured to perform a BIST, processing logic coupled to the BIST logic and storage logic coupled to the processing logic. The storage logic comprises debug context information associated with a debugging session. Prior to performance of the BIST, the processing logic stores the debug context information to a destination. After performance of the BIST, the processing logic is reset, and the processing logic restores the debug context information from the destination to the storage logic.