Debug Context Management for Real-Time Processors

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Solution Overview

Problem

Existing debugging technologies for embedded processors face challenges in maintaining real-time execution control and coherent debug contexts, especially when dealing with multiple interrupt levels and high-priority tasks, which can lead to incomplete or misleading debug information and system instability.

Innovation Solution

A debug monitor approach that integrates hardware logic within the processor to manage real-time execution, allow servicing of higher-priority interrupts, and maintain coherent debug contexts by using a debug frame counter and register to track and restore processor states, ensuring accurate and consistent debugging sessions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the processor is halted at a breakpoint for debugging, then debug information can be obtained, but real-time execution control is lost and critical tasks cannot be serviced

Engineering Contradiction:
Improvedebug information accuracyVSAvoidreal-time task execution
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the processor state into multiple debug contexts (first debug context and second debug context) that can be independently maintained. When a breakpoint is hit, the processor halts and preserves the first debug context, but can still service higher-priority interrupts by switching to a second debug context, allowing both debugging and real-time execution to coexist without mutual interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by saving the first debug context (processor state at breakpoint) before allowing the processor to resume for servicing higher-priority interrupts. This ensures that the debug context is preserved and can be restored later, maintaining debug information accuracy while enabling real-time task execution.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If higher-priority interrupts are allowed to service during debugging, then system stability is maintained, but debug context coherence may be compromised

Engineering Contradiction:
Improvesystem stabilityVSAvoiddebug context coherence
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent introduces a debug context register as an intermediary that manages the transition between different debug contexts. When servicing higher-priority interrupts, the processor switches to a second debug context, and upon return, the debug context register facilitates the restoration of the first debug context, ensuring coherence is maintained despite intermediate interruptions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback through the debug monitor function that tracks processor state changes and manages context switching. The debug monitor receives feedback about interrupt servicing completion and uses this information to determine when to restore the original debug context, ensuring that debug information remains coherent and accurate.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If multiple debug contexts are maintained, then both breakpoint debugging and interrupt servicing are supported, but device complexity increases

Engineering Contradiction:
Improvedebugging flexibilityVSAvoiddebug controller structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the debug context register and debug monitor to handle multiple debug contexts through a unified interface. The same debug controller structure manages both the first debug context (breakpoint debugging) and the second debug context (interrupt servicing), reducing the need for separate complex mechanisms for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12038826B2Managing and maintaining multiple debug contexts in a debug execution mode for real-time processors
Publication Date: 2024.07.16 TEXAS INSTRUMENTS INC
  • US12038826B2 patent drawing
  • US12038826B2 patent drawing
  • US12038826B2 patent drawing

AI summary

A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.