In-Circuit Debug Context Backup Across Microcontroller Sleep Modes

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Solution Overview

Problem

Microcontrollers in systems like switched-mode power supplies face challenges during debugging due to loss of debug context information when entering low power consumption mode, making it difficult to debug during the start-up phase after wake-up.

Innovation Solution

An embedded controller with debug logic, an interface circuit, and memory that reads and writes debug information from/to memory during mode changes, ensuring debug context is backed up and restored quickly across supply domains, enabling immediate debugging post-wake-up.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the microcontroller enters low power consumption mode to reduce energy usage, then power consumption is reduced, but debug context information is lost

Engineering Contradiction:
Improvepower consumptionVSAvoiddebug context information
Core Design Contradiction:
Use of energy by moving objectVSLoss of information

Solution Approach 1:

The debug context information is backed up to external memory before the microcontroller enters low power consumption mode. This preliminary action ensures that the debug information is preserved and can be restored when needed, resolving the contradiction between reducing power consumption and maintaining debug information.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The debug context information is copied from the microcontroller's internal memory to external memory before entering low power mode. This copying mechanism allows the original information to be preserved externally while the microcontroller can be powered down, thus reducing power consumption without losing debug information.

Inventive Principle:
Principle #26Copying

2Loss of information

If the debug context is backed up to external memory before entering low power mode, then debug information is preserved, but additional time is required for backup and restore operations

Engineering Contradiction:
Improvedebug context informationVSAvoidtime for backup and restore
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The debug context is backed up to external memory in advance before the microcontroller enters low power consumption mode. This preliminary backup ensures that when the microcontroller wakes up, the debug information is already available in external memory, minimizing the restore time and addressing the time loss concern.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the microcontroller remains in normal operation mode to maintain debug capability, then debug context is maintained, but power consumption increases

Engineering Contradiction:
Improvedebug capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The debug context information is backed up to external memory before the microcontroller enters low power consumption mode. This preliminary action allows the microcontroller to be powered down while preserving debug information, enabling debug capability to be restored without keeping the microcontroller continuously powered on.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The debug context is copied to external memory, allowing the microcontroller to enter low power mode while the debug information persists externally. This copying mechanism decouples the power state of the microcontroller from the persistence of debug information, enabling energy savings while maintaining debug capability.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10942838B2Microcontroller system with in-circuit debugger
Publication Date: 2021.03.09 INFINEON TECH AUSTRIA AG
  • US10942838B2 patent drawing
  • US10942838B2 patent drawing
  • US10942838B2 patent drawing

AI summary

An electronic device is described herein. In accordance with one embodiment, the electronic device includes an embedded controller having a debug logic, an interface circuit coupled to the debug logic, and a memory coupled to the interface circuit. The interface circuit is operative to read debug information stored in the debug logic and to transmit the read debug information to the memory. The interface circuit is further operative to receive debug information stored in the memory and write the received debug information into the debug logic.