Post-Synthesis Debug Core Insertion in SoC Designs
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Solution Overview
Problem
Debugging circuit designs after implementation is difficult and time-consuming due to the absence of necessary debug cores and interfaces, especially in complex system-on-chip platforms where accessing signals is slow or complex.
Innovation Solution
A method and system that automatically identify and instantiate missing debug cores and interfaces in a circuit design, synthesizing them to create a modified circuit design, and generating a circuit definition for implementation, allowing for easier debugging and reconfiguration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Difficulty of detecting and measuring
If debug cores and interfaces are added to a circuit design after implementation, then debugging capability is improved, but device complexity and integration difficulty increase
Solution Approach 1:
The patent applies preliminary action by automatically inserting debug cores and interfaces into the circuit design during the synthesis phase, before implementation. This allows debugging capability to be built in advance without requiring manual integration after the circuit is implemented, thereby improving debugging accessibility while avoiding the complexity of post-implementation modifications.
Solution Approach 2:
The system applies self-service by using an automated tool that analyzes the circuit design, identifies required debug signals, and inserts appropriate debug cores and interfaces without requiring manual designer intervention. This self-automating process improves debugging capability while minimizing the increase in design complexity by eliminating manual configuration steps.
2Difficulty of detecting and measuring
If debug cores and interfaces are manually integrated into a circuit design, then debugging capability is improved, but time consumption and effort increase
Solution Approach 1:
The patent implements self-service through an automated tool that performs the entire debug core integration process without manual intervention. The tool automatically analyzes the circuit design, determines which signals require probing, selects appropriate debug cores, and integrates them into the design. This eliminates the time-consuming manual process of debugging integration while maintaining full debugging capability.
Solution Approach 2:
The system performs preliminary action by automatically completing the debug integration process during the design synthesis phase. This preliminary automated integration eliminates the need for time-consuming manual debugging setup after implementation, thereby reducing the loss of time while ensuring comprehensive debugging capability is established in advance.
3Difficulty of detecting and measuring
If existing interfaces are used to access debug signals in SoC platforms, then debugging capability is limited, but interface complexity and integration difficulty increase
Solution Approach 1:
The patent applies segmentation by dividing the debug signal access function into separate, dedicated debug cores that are inserted directly at the signal source. Instead of using complex existing interfaces to access signals, the circuit is segmented to include specialized debug components that directly probe the required signals, thereby improving access capability while reducing interface integration complexity.
Solution Approach 2:
The system uses debug cores as intermediary components between the circuit signals and the debugging system. These intermediary debug cores directly interface with the target signals and provide simplified access points, eliminating the need to use complex existing SoC interfaces. This intermediary approach improves signal access capability while reducing the complexity of interface integration.
Data Source
AI summary
Approaches for post-synthesis insertion of debug cores include a programmed processor inputting data that identify signals of a synthesized circuit design to be probed and determining whether or not debug cores and interfaces needed to probe the signals are absent from the circuit design. The programmed processor creates, in response to determining that the debug cores and interfaces are absent, the debug cores and interfaces in the circuit design. The programmed processor couples the debug cores and interfaces to the signals in the circuit design and synthesizes the debug cores and interfaces created in the circuit design to create a modified circuit design. The method includes generating a circuit definition from the modified circuit design by the programmed processor, and implementing a circuit that operates according to the circuit definition.