Non-intrusive Debug Port Interface for Processor Pin Sharing
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Solution Overview
Problem
Existing processor architectures face challenges in efficiently sharing pins for debugging purposes without interfering with primary operations, as adding pins for debugging is wasteful and previous solutions either require complex timing, intrusive methods, or disrupt system conditions.
Innovation Solution
A processor design that uses one or more pins to output debugging information through keyboard lines, allowing for intermittent transmission without disrupting keyboard operations, by extending or delaying signal transfer and stalling operations as needed, and utilizing a controller to manage shared output lines between units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional pins are added to the processor to output debugging codes, then debugging capability is improved, but processor size and cost increase
Solution Approach 1:
The patent applies multi-functionality by enabling keyboard output pins to serve dual purposes: normal keyboard operation mode and debugging mode. The same pins that drive keyboard display segments are repurposed to output debug codes to an external display device, eliminating the need for separate dedicated debug pins while maintaining full keyboard functionality.
Solution Approach 2:
The patent merges the debug output function with the existing keyboard output function by combining their signal paths. The keyboard segment drive circuitry is integrated with the debug code output circuitry, allowing a single pin configuration to handle both keyboard display and debug code transmission to external devices.
2Device complexity
If pins are shared between keyboard and debug output, then pin usage efficiency is improved, but signal interference occurs
Solution Approach 1:
The patent implements periodic action through time-division multiplexing, where the shared pins alternate between carrying keyboard scan signals and debug codes. The controller sequentially outputs scan signals for keyboard operation and debug codes for debugging mode, preventing simultaneous transmission of both signal types on the same pins to avoid interference.
Solution Approach 2:
The patent applies dynamics by making the pin function changeable rather than fixed. The same physical pins can dynamically switch between serving keyboard operations and debug output based on operational mode. The controller adapts the pin usage in real-time, transitioning between keyboard service mode and debugging mode as needed.
3Device complexity
If debug codes are transmitted on keyboard lines, then pin sharing is improved, but keyboard operation correctness may be compromised
Solution Approach 1:
The patent segments the transmission timeline into distinct periods for keyboard scan signals and debug code transmission. By dividing the operational cycles into separate time slots, the system ensures that keyboard scanning and debug output occur sequentially rather than simultaneously, maintaining keyboard correctness while enabling pin sharing.
Solution Approach 2:
The patent incorporates feedback mechanisms where the controller monitors keyboard scan signal timing and adjusts debug code transmission accordingly. The system uses feedback from the scan signal state to determine when to switch between keyboard mode and debug mode, ensuring keyboard operations complete successfully before debug transmission begins.
4Adaptability or versatility
If existing bus interfaces are used for debug output, then debugging is enabled, but system complexity and cost increase
Solution Approach 1:
The patent extracts the debug output function from complex bus interfaces and implements it using simple existing keyboard output pins. Instead of requiring full ISA/PCI bus connections or specialized debug buses, the system extracts the essential debug signal transmission capability and achieves it through repurposing simple parallel output pins already present for keyboard operation.
Data Source
AI summary
A processor having a core configured to control a keyboard and a plurality of pins connected to the core, configured to transfer signals from the processor to the keyboard. A controller is configured to transfer signals from one or more registers through at least one of the pins, intermittently with signals transferred to the keyboard.