Debug State Machines for IC Failure Detection
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Solution Overview
Problem
In the back-end integrated circuit (IC) development process, ensuring that hardware functions correctly before shipment is challenging due to insufficient time for thorough testing and opaque aspects of hardware and state machine functionality, leading to potential undetected failures.
Innovation Solution
The integration of debug state machines (DSMs) within electronic modules, enabling cross-triggering between multiple DSMs across a single integrated circuit or multiple packaged devices, provides visibility and coordination of state-related activities, facilitating more accurate debugging through methods like cross triggering and programmable actions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If extremely targeted hardware elements are implemented to pipe out functional signatures, then certain aspects of core functioning become externally visible, but dense content execution may cause failures to remain undetected unless execution continues for a sufficiently long period of time
Solution Approach 1:
The patent divides the debug system into multiple independent debug state machines (DSMs), each monitoring specific functional signatures from different parts of the core. This segmentation allows parallel monitoring of multiple execution paths simultaneously, enabling faster detection of failures without requiring prolonged execution of dense content.
Solution Approach 2:
The patent introduces a temporal dimension to debug visibility by implementing state machines that track not just current functional signatures but also historical state transitions. This allows the system to detect failures by analyzing state sequences over time, rather than relying solely on immediate functional output visibility.
2Productivity
If traditional debug methods are used with insufficient testing time, then development proceeds faster, but hardware may contain undetected failures when deployed
Solution Approach 1:
The patent implements debug state machines and functional signature monitoring before hardware deployment. By establishing comprehensive state tracking and signature piping in advance, the system enables thorough validation of hardware correctness during the development phase, ensuring reliability is verified before shipment without significantly extending the development timeline.
Data Source
AI summary
Embodiments include methods for performing various operations in a computing system that includes an electronic module and a debug circuit. The method includes programming the debug circuit to monitor for pre-selected triggers produced by the computing system, and to perform actions in response to detecting the pre-select triggers. For example, in response to various pre-selected triggers, the debug circuit may, among other things: perform state transitions and log information indicating whether or not the state transitions were performed; monitor various signals when the debug circuit has determined that a test escape has occurred; and/or perform one or more actions that initiate stopping one or more clocks in response to certain pre-selected triggers.