Debug Trace Data Gap Insertion and Bandwidth Throttling

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Solution Overview

Problem

Current debug technologies face challenges in efficiently managing and transmitting large amounts of debug trace data, such as program counter tracing, cycle accurate profiling, and load/store data logging, due to bandwidth limitations, leading to potential data loss and excessive bandwidth consumption.

Innovation Solution

The introduction of a 'data gap' marker with an accompanying count value in the trace stream to indicate lost data, along with throttling mechanisms like Dead-Window Throttle and Real-Time Throttle, to control trace data output and prevent data loss by injecting markers that specify the amount of data missed, and implementing filtering and triggering capabilities to manage bandwidth effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If a large number of high frequency pins are supplied to view all debug data, then visibility into program operation is improved, but cost and practicality worsen

Engineering Contradiction:
Improvedebug trace data visibilityVSAvoidnumber of pins
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent combines multiple debug trace data types (program counter tracing, cycle accurate profiling, load and store data logging) into a single compressed data stream transmitted through a limited number of pins. The compression encoder merges these different data sources into an efficient representation that fits within the physical pin constraints.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies compression encoding to change the parameter of data representation, transforming raw debug trace data into a compressed format. This parameter change reduces the amount of data that needs to be transmitted, allowing full debug visibility through fewer pins without losing information.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If compression encoding is applied to reduce data transmission, then bandwidth utilization is improved, but hardware complexity worsens

Engineering Contradiction:
Improvebandwidth utilizationVSAvoidon-chip hardware expenditure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The compression system is segmented into separate functional blocks: compression encoder, decompression decoder, and gap insertion logic. This segmentation allows the complex compression functionality to be distributed and managed in modular units, reducing the perceived hardware complexity while maintaining high bandwidth utilization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a gap insertion mechanism as an intermediary between the compression encoder and the transmission interface. This intermediary component manages the trade-off between compression efficiency and hardware complexity by selectively inserting gap markers when compression resources are constrained, allowing the system to operate effectively with varying levels of hardware expenditure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If trace data transmission is increased to capture all system activity, then measurement precision is improved, but bandwidth consumption worsens

Engineering Contradiction:
Improvesystem activity tracking accuracyVSAvoiddata transmission volume
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent changes the parameter of data representation through compression encoding, transforming verbose debug trace data into a compact format. This parameter change maintains measurement precision by preserving all essential system activity information while dramatically reducing the quantity of data that needs to be transmitted across the debug interface.

Inventive Principle:
Principle #35Parameter changes

4Speed

If CPU clock rates are increased to improve processing speed, then productivity is improved, but trace data compression requirements worsen

Engineering Contradiction:
ImproveCPU clock rateVSAvoidtrace data compression efficiency
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The patent implements a dynamic gap insertion mechanism that adapts to varying CPU clock rates and trace data generation speeds. When the CPU operates at higher clock rates and generates more trace data than can be compressed and transmitted, the system dynamically inserts gap markers to indicate periods of lost data, allowing the system to maintain productivity while managing compression limitations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The compression system incorporates feedback mechanisms that monitor the relationship between CPU clock rate and trace data generation. This feedback allows the system to adjust compression aggressiveness and gap insertion frequency, ensuring that trace data compression efficiency is maintained even as CPU speed increases and generates more trace information.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9244805B2Method for generating descriptive trace gaps
Publication Date: 2016.01.26 TEXAS INSTRUMENTS INC
  • US9244805B2 patent drawing
  • US9244805B2 patent drawing

AI summary

A method of managing a debug trace data stream by detecting conditions where the trace data generated exceeds the available transmission bandwidth, and inserting a trace data gap into the trace data stream. The gap may contain additional information relating to the amount and type of data that is being lost during the overflow condition. In an alternate embodiment the generated trace may be throttled to ensure the available bandwidth is not exceeded.