Debug Trace Stream Core Synchronization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multi-core processor systems face challenges in maintaining synchronization and reducing downtime due to Single Event Upsets (SEUs), which can cause desynchronization and require complex reset processes, affecting system availability and complexity.
Innovation Solution
A method and system that monitor debug trace data streams to identify affected cores, adjust redundancy modes, and restart cores using safe restart times, ensuring synchronization and minimizing downtime by reloading register data from unaffected cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all cores are reset to handle desynchronization, then system reliability is improved, but system availability deteriorates due to extended downtime
Solution Approach 1:
The system segments the core reset operation by identifying and isolating only the affected core that caused the desynchronization, rather than resetting all cores. The supervisor compares trace streams to determine which specific core is out of lockstep, then restarts only that core while allowing other cores to continue operating, thus reducing overall system downtime.
Solution Approach 2:
Instead of performing a complete system reset (excessive action), the system applies partial action by resetting only the minimal necessary component (the affected core). This partial reset approach maintains system availability by keeping unaffected cores operational while still achieving the goal of restoring synchronization.
2Stability of the object's composition
If multiple cores are restarted simultaneously, then synchronization is restored, but system complexity increases due to coordination overhead
Solution Approach 1:
The supervisor automatically monitors trace streams, detects desynchronization, identifies affected cores, and triggers selective restarts without external intervention. This self-service approach simplifies the system by eliminating the need for complex external coordination mechanisms while maintaining core synchronization.
Solution Approach 2:
The system implements continuous feedback by monitoring debug trace streams from each core and comparing their states. When a state difference is detected, the feedback triggers a targeted restart of the affected core, creating a closed-loop control system that maintains synchronization with minimal complexity.
3Reliability
If TMR voting logic is implemented across all cores, then fault tolerance is improved, but device complexity and size increase
Solution Approach 1:
The system extracts the fault detection functionality from a full TMR voting architecture and implements it through supervisor-mediated trace stream comparison. This extraction eliminates the need for complex inter-core voting logic while maintaining the ability to detect and respond to faults, thereby reducing device complexity.
Solution Approach 2:
The supervisor acts as an intermediary that centralizes the fault detection and coordination functions. Instead of implementing distributed voting logic across all cores (which increases complexity), the supervisor mediates between cores by monitoring their trace streams and coordinating selective restarts, achieving fault tolerance with reduced complexity.
4Measurement precision
If debug trace monitoring is implemented, then detection precision is improved, but use of energy increases due to continuous monitoring overhead
Solution Approach 1:
The supervisor periodically samples and compares trace streams from cores rather than continuously monitoring every cycle. This periodic action maintains adequate detection precision for identifying desynchronization events while reducing the energy overhead associated with constant monitoring of all core activities.
Data Source
AI summary
The present disclosure provides for synchronization of multi-core systems by monitoring a plurality of debug trace data streams for a redundantly operating system including a corresponding plurality of cores performing a task in parallel; in response to detecting a state difference on one debug trace data stream of the plurality of debug trace data streams relative to other debug trace data streams of the plurality of debug trace data streams: marking a given core associated with the one debug trace data stream as an affected core; and restarting the affected core.