Decentralized Load-Balancing Mechanism for Processor Scheduling

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Solution Overview

Problem

Conventional techniques for load-balancing in graphics processors do not provide uniform distribution of workload, leading to performance inefficiencies due to centralized scheduling methods that are unaware of local realities and cannot dynamically address load-balancing issues.

Innovation Solution

A decentralized load-balancing mechanism that allows threads or thread groups to migrate dynamically between processing units without relying on a centralized scheduler, using detection/migration logic, copy engine reference logic, and communication/compatibility logic to monitor and balance compute utilization across neighboring slices or graphics processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If centralized scheduling methods are used for load-balancing, then workload distribution can be controlled from a single point, but performance efficiency deteriorates due to lack of awareness of local realities and inability to dynamically address load-balancing issues

Engineering Contradiction:
Improveperformance efficiencyVSAvoidscheduling system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the centralized scheduler into distributed scheduling units at each processing unit. Each processing unit independently manages its own thread scheduling and load-balancing, eliminating the bottleneck of a single centralized scheduler while maintaining coordinated operation across the system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processing unit autonomously monitors its own workload and communicates with neighboring units to perform local load-balancing operations. The system enables self-service by allowing processing units to independently detect imbalances and migrate threads without requiring centralized coordination, thereby improving responsiveness and performance efficiency.

Inventive Principle:
Principle #25Self-service

2Productivity

If threads are statically assigned to processing units, then scheduling simplicity is maintained, but load-balancing uniformity deteriorates leading to performance inefficiencies

Engineering Contradiction:
Improveload-balancing uniformityVSAvoidscheduling operation simplicity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent implements dynamic thread migration between processing units based on real-time workload conditions. Threads can be dynamically reassigned from overloaded units to underloaded units through decentralized detection and migration logic, enabling the system to adapt to changing workloads while maintaining relatively simple local scheduling operations at each unit.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If centralized load-balancing is implemented, then overall system coordination is simplified, but local load-balancing responsiveness deteriorates

Engineering Contradiction:
Improveload-balancing response timeVSAvoiddecentralized coordination complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements load-balancing logic at the local level within each processing unit, enabling immediate detection and response to local workload imbalances. Each unit maintains its own scheduling queue and can independently migrate threads to neighboring units, achieving fast local response without requiring complex centralized coordination mechanisms.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11354171B2De-centralized load-balancing at processors
Publication Date: 2022.06.07 INTEL CORP
  • US11354171B2 patent drawing
  • US11354171B2 patent drawing
  • US11354171B2 patent drawing

AI summary

A mechanism is described for facilitating localized load-balancing for processors in computing devices. A method of embodiments, as described herein, includes facilitating hosting, at a processor of a computing device, a local load-balancing mechanism. The method may further include monitoring balancing of loads at the processor and serving as a local scheduler to maintain de-centralized load-balancing at the processor and between the processor and other one or more processors.