Decimal Divide Operations Using Floating-Point Arithmetic

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Solution Overview

Problem

Existing methods for performing shift and divide operations on large numbers encoded in decimal integer format using floating-point arithmetic face challenges with quotient overflow, leading to inefficiencies in processing very large numbers.

Innovation Solution

The method involves converting decimal numbers to floating-point numbers, performing shift and divide operations, and then converting back to decimal, utilizing a Vector Shift and Divide Decimal (VSDP) instruction to handle overflow by reducing the dividend size and truncating results to ensure accurate output of the rightmost 31 digits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If floating-point division is performed on large decimal numbers, then processing speed is improved, but quotient overflow occurs

Engineering Contradiction:
Improvedivision operation speedVSAvoidquotient accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs preliminary actions by converting decimal operands to floating-point format before division, estimating the quotient magnitude in advance, and determining the number of trailing zeros needed. This preliminary estimation and preparation allows the division to proceed efficiently while preventing overflow by pre-calculating the appropriate scaling factor.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes parameters by converting between decimal and floating-point representations, adjusting the scale and precision of numbers during computation. By dynamically changing the numerical representation and adding trailing zeros to the quotient, the system maintains accuracy while utilizing the speed advantages of floating-point arithmetic.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If traditional decimal division methods are used, then quotient accuracy is maintained, but processing efficiency decreases

Engineering Contradiction:
Improvequotient accuracyVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces floating-point arithmetic as an intermediary mechanism between traditional decimal division and final decimal result. The floating-point format serves as a mediator that enables efficient computation during the division process, while conversion routines ensure the final result maintains decimal accuracy and proper formatting.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical traditional decimal division algorithm with floating-point arithmetic operations. This substitution leverages the optimized hardware and software support for floating-point math, achieving significantly higher processing efficiency while maintaining result accuracy through careful management of number representations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If floating-point arithmetic is used for shift operations, then operation speed is improved, but precision is lost

Engineering Contradiction:
Improveshift operation speedVSAvoiddecimal precision
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent performs preliminary conversion of decimal numbers to floating-point format before shift operations, executes the efficient floating-point shift, then converts the result back to decimal format. This preliminary preparation and subsequent conversion ensure that the speed benefits of floating-point arithmetic are captured while the final precision requirements of decimal arithmetic are met.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10216480B2Shift and divide operations using floating-point arithmetic
Publication Date: 2019.02.26 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10216480B2 patent drawing
  • US10216480B2 patent drawing
  • US10216480B2 patent drawing

AI summary

An aspect includes fetching a computer instruction, the fetching by an instruction fetch unit. It is determined that the instruction is a decimal divide instruction that specifies a decimal divisor and a decimal dividend. The decimal divisor is converted into a floating-point divisor and the decimal dividend is converted into a floating-point dividend. A floating-point division of the floating-point dividend by the floating-point divisor is performed by an instruction execution unit. It is determined that the floating-point division resulted in a quotient overflow. A reduced size floating-point dividend is generated based on the quotient overflow, the floating-point divisor, and the floating-point dividend. The floating point division of the reduced size floating-point dividend by the floating-point divisor is performed by the instruction execution unit, and a specified number of rightmost bits of the result is output as the quotient.