Decision Feedback Equalizer With Timing Compensation Latch

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Solution Overview

Problem

Existing decision feedback equalizers consume high power or have long feedback loop times, making them inefficient for equalizing data signals with low power and high-speed data transfer.

Innovation Solution

A decision feedback equalizer is designed with a first input latch that generates output signals by comparing data with a reference voltage and using feedback to compensate for timing differences, thereby optimizing power consumption and equalization performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a decision feedback equalizer is used to equalize data signals, then the quality of data signals is improved, but power consumption increases

Engineering Contradiction:

Improvedata signal qualityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The equalizer is divided into multiple processing paths: a main processing path for strong data signals and a supplementary processing path for weak data signals. The supplementary path is only activated when signal strength falls below a threshold, segmenting the power consumption based on signal conditions and reducing overall power usage while maintaining equalization quality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The equalizer dynamically adjusts its operating parameters based on signal strength detection. When the input signal strength exceeds a threshold, the supplementary processing path is disabled; when it falls below the threshold, the supplementary path is activated. This parameter-based control optimizes power consumption according to actual signal conditions.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a decision feedback equalizer is used to equalize data signals, then the quality of data signals is improved, but feedback loop time increases

Engineering Contradiction:

Improvedata signal qualityVSAvoidfeedback loop time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The supplementary processing path performs equalization operations in advance for weak data signals before they would otherwise degrade the output quality. By preparing the equalized version of weak signals through the supplementary path and combining it with the main path output, the system reduces the effective feedback loop time needed to achieve proper equalization.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

A signal strength detection circuit acts as an intermediary that determines whether the supplementary processing path should be activated. This intermediary component enables the system to quickly switch between processing modes based on signal conditions, reducing the time penalty associated with feedback loop operations by avoiding unnecessary processing for strong signals.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If data signals are transmitted at high speeds, then data transfer efficiency is improved, but signal quality deteriorates due to noise and intersymbol interference

Engineering Contradiction:

Improvedata transfer speedVSAvoidsignal quality

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The equalizer employs dynamic processing that adapts to varying signal conditions in real-time. The signal strength detection circuit continuously monitors input signals and dynamically activates or deactivates the supplementary processing path, allowing the system to maintain high equalization performance at high data transfer speeds while adapting to changing channel conditions that cause intersymbol interference and noise.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The decision feedback equalizer uses feedback from previously detected data symbols to compensate for intersymbol interference in current symbols. By feeding back decisions about previous symbols and using them to correct current symbol detection, the system maintains signal quality at high transmission speeds where intersymbol interference would otherwise degrade performance.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS12206529B2Decision feedback equalizer and a device including the same

Publication Date: 2025.01.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A decision feedback equalizer including: a first input latch configured to generate a first output signal from first data received by the first input latch, wherein the first input latch includes: a first sub-circuit configured to receive the first data and a reference voltage, compare the first data and the reference voltage, and generate first internal signals having different transition timings according to a result of the comparison between the first data and the reference voltage; and a second sub-circuit configured to receive, as first feedback, a second output signal, which corresponds to second data received by the first latch earlier than the first data, and generate the first output signal, which compensates for a difference between the transition timings of the first internal signals, based on the first feedback.