Decision Module for Circuit Synthesis Constraint Handling
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Solution Overview
Problem
Current IC design synthesis tools face inefficiencies due to the need to select between multiple viable implementations without sufficient constraint data, leading to resource-intensive and time-consuming iterative processes, as they often make greedy decisions that affect other circuit modules, causing cascading effects and requiring exponential computations to converge to a solution that satisfies all constraints.
Innovation Solution
The introduction of a 'decision module' that retains alternative solutions within the netlist throughout the EDA process, allowing for selection based on design constraints, enabling the identification of preferred solutions from an exponential number of options using a linear representation, and facilitating placement and routing operations without reverting to previous stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If synthesis tools make greedy decisions early in the synthesis flow to select between different adder implementations, then the synthesis process can proceed without waiting for constraint information, but the selection may not satisfy timing or area constraints leading to iterative repetitions
Solution Approach 1:
The patent applies preliminary action by pre-generating multiple alternative implementations (e.g., different adder structures) and retaining them as viable options throughout the synthesis flow, rather than making premature selections. This allows the synthesis tool to proceed with placeholder representations while waiting for constraint information, and then select the appropriate implementation once timing and area constraints are known, thus maintaining both productivity and constraint satisfaction
Solution Approach 2:
The patent implements dynamics by making the synthesis process adaptive to available constraint information. The tool dynamically adjusts its behavior: when constraints are available, it selects from pre-generated alternatives; when constraints are not yet known, it retains multiple options and delays selection. This dynamic approach eliminates the need for iterative repetitions while ensuring constraint satisfaction
2Reliability
If the synthesis tool waits for sufficient constraint information before selecting between viable options, then the selection can satisfy design constraints, but the synthesis process becomes time-consuming and resource-intensive
Solution Approach 1:
The patent applies preliminary action by pre-generating multiple alternative implementations and retaining them as viable options throughout the synthesis flow, rather than making premature selections. This allows the synthesis tool to proceed with placeholder representations while waiting for constraint information, and then select the appropriate implementation once timing and area constraints are known, thus maintaining both productivity and constraint satisfaction
Solution Approach 2:
The patent uses copying by creating placeholder representations of multiple alternative implementations and retaining these copies throughout the synthesis flow. Instead of working with the actual complex circuit implementations, the tool works with simplified placeholder copies that consume minimal resources. When constraint information becomes available, the appropriate copy is selected and replaced with the actual implementation, thus avoiding time-consuming processing while ensuring constraint satisfaction
3Reliability
If a placer directs the synthesizer to provide alternative implementations for circuit modules violating design constraints, then those specific constraints are satisfied, but other circuit modules may be adversely affected causing cascading effects
Solution Approach 1:
The patent applies universality by generating multiple alternative implementations for each circuit module that can satisfy different constraint scenarios. Instead of optimizing for a single constraint, the synthesizer creates a universal set of alternatives that cover various timing and area requirements. This allows the placer to select from pre-generated alternatives without causing cascading effects, as each alternative is designed to meet different constraint combinations
Solution Approach 2:
The patent applies preliminary action by pre-generating multiple alternative implementations and retaining them as viable options throughout the synthesis flow. This allows the synthesis tool to proceed with placeholder representations while waiting for constraint information, and then select the appropriate implementation once timing and area constraints are known, thus maintaining both productivity and constraint satisfaction
4Reliability
If the synthesis tool refrains from selecting between viable options until necessary information is available, then constraint satisfaction is improved, but each possible option must be divided into a separate netlist consuming exponential memory and processing resources
Solution Approach 1:
The patent uses copying by creating placeholder representations of multiple alternative implementations and retaining these copies throughout the synthesis flow. Instead of working with the actual complex circuit implementations, the tool works with simplified placeholder copies that consume minimal resources. When constraint information becomes available, the appropriate copy is selected and replaced with the actual implementation, thus avoiding exponential resource consumption while ensuring constraint satisfaction
Solution Approach 2:
The patent applies taking out by extracting only the essential information needed to represent multiple alternatives (the placeholder representations) rather than retaining the full detailed implementations. This extraction allows the tool to maintain multiple viable options in memory with minimal resource consumption. The full implementations are only instantiated when needed, based on constraint information
Data Source
AI summary
An abstract decision module primitive for placement within a logical representation (i.e., a netlist) of a circuit design is described. The decision module primitive receives as inputs alternative solutions for a given function or segment of a netlist. The alternative solutions include functionally equivalent, but structurally different implementations of the function or segment of the netlist. The decision module primitive alternatively selects between connecting one of the inputs to the netlist to provide a complete functional definition for the netlist based on constraint information.The selected input of the decision module may be updated as additional constraint information is determined throughout the various stages of the design process. In addition, alternative solutions for a given function or segment of the netlist may be added to and/or removed from the inputs of a decision module as additional constraint information is identified.