Decision Transformer Verification for Processor Coverage Closure
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Solution Overview
Problem
Conventional design verification using a Universal Verification Methodology (UVM) testbench environment faces challenges in achieving repeatable coverage and efficiently reaching 100% coverage closure due to the randomness of stimuli, requiring manual adjustments and directed tests.
Innovation Solution
Employing an online decision transformer (ODT), a reinforcement learning model, to automate and accelerate the design verification process by predicting next actions to maximize coverage using sequence-level entropy regularizers and autoregressive modeling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If constrained random transactions are used in UVM testbench environment, then test scenarios can be generated automatically, but coverage repeatability deteriorates and manual adjustments are required
Solution Approach 1:
The patent implements a feedback mechanism where coverage metrics from test execution are fed back into the test scenario generation process. The system analyzes which code paths and functionalities have been covered and uses this information to generate subsequent test scenarios that target uncovered areas, ensuring repeatable coverage closure without manual intervention.
Solution Approach 2:
The system performs preliminary analysis of the design under test to identify all testable functionalities and code paths before test execution begins. This preliminary action creates a comprehensive coverage map that guides the automatic generation of test scenarios, ensuring that all necessary coverage is achieved systematically rather than through random trial and error.
2Productivity
If constrained random transactions are used in UVM testbench environment, then test execution can proceed, but achieving 100% coverage closure requires manual adjustments and directed tests
Solution Approach 1:
The system implements self-service automation where the testbench automatically generates directed tests targeting uncovered functionalities based on real-time coverage analysis. The stimulus generator monitors coverage metrics and autonomously creates appropriate test scenarios to close coverage gaps, eliminating the need for manual test adjustments while maintaining high execution speed.
Solution Approach 2:
The test scenario generation is made dynamic and adaptive rather than static. The system continuously adjusts the mix of random and directed tests based on current coverage status, automatically transitioning from random exploration to targeted coverage closure as needed, thereby maintaining productivity while eliminating manual intervention.
3Reliability
If more test scenarios are added to cover all DUT aspects, then coverage closure improves, but verification complexity and time increase
Solution Approach 1:
The system applies partial action by generating only the necessary test scenarios required to achieve coverage closure,而非 exhaustively testing all possible scenarios. It identifies and executes only the minimal set of directed tests needed to cover uncovered functionalities, thereby achieving 100% coverage closure without unnecessary verification time expenditure.
Solution Approach 2:
By performing preliminary coverage analysis and planning before test execution, the system pre-identifies the exact test scenarios needed for coverage closure. This eliminates redundant test execution and ensures that verification time is spent only on necessary tests, achieving fast coverage closure.
Data Source
AI summary
Performing transformer-based design verification for coverage closure in processor devices is disclosed herein. In one exemplary embodiment, a processor device trains an online decision transformer (ODT) using initial trajectories based on regression testing of a Design-Under-Test (DUT). The processor device then performs an online learning phase using the ODT by first generating a plurality of new trajectories. For each new trajectory, the processor device uses the ODT to generate a sequence of actions based on maximizing coverage, transmits the sequence of actions to a testbench environment, receives a corresponding sequence of observed states and a corresponding sequence of coverage metrics from the testbench environment, and generates the new trajectory. The processor device identifies a subset of the new trajectories having a final coverage metric that exceeds a coverage threshold, adds the subset to a replay buffer of the ODT, and retrains the ODT using the replay buffer.