Decision Tree Scheduler for Heterogeneous Processor Task Scheduling

Solution Overview

Problem

Scheduling application tasks on heterogeneous computer architectures is challenging due to the difficulty in making near-optimal scheduling decisions within nanoseconds, which is comparable to task execution times.

Innovation Solution

A decision tree scheduler is employed, which is differentiable and can be pre-trained using a simulation of the heterogeneous architecture. This scheduler integrates multiple objectives, allowing for runtime adjustments with a single trained model, and reduces the calculation burden compared to neural network structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If sophisticated scheduling approaches such as machine learning are used, then scheduling decision quality improves, but runtime overhead increases significantly

Engineering Contradiction:
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent pre-trains the decision tree scheduler offline using simulated heterogeneous architecture data to learn optimal scheduling patterns. During runtime, the pre-trained model makes rapid decisions by simply traversing the decision tree structure without performing complex computations, thus achieving high scheduling decision quality with minimal runtime overhead

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a shallow decision tree structure with limited depth (e.g., 3-5 levels) that requires minimal computational resources to traverse. Each node in the tree performs simple feature threshold comparisons rather than complex neural network computations, making the scheduling process computationally inexpensive and suitable for real-time operation

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Speed

If a shallow decision tree is used for fast scheduling, then computational speed improves, but the ability to capture complex scheduling patterns deteriorates

Engineering Contradiction:
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent transforms the scheduling problem by changing parameters during offline training (using complex patterns and multiple objectives) versus runtime execution (using simple tree traversal). The decision tree is trained to encode complex scheduling patterns in its structure and node thresholds, allowing shallow trees to capture sophisticated patterns without requiring deep architectures during runtime

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple scheduling objectives are integrated, then scheduling flexibility improves, but model complexity and training difficulty increase

Engineering Contradiction:
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs a universal decision tree scheduler that can handle multiple scheduling objectives (e.g., energy efficiency, execution time, throughput) within a single model. The same tree structure and decision logic are used regardless of which objective is prioritized, with objectives being adjusted through feature weighting and threshold settings rather than requiring separate models for each objective

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250068462A1Heterogeneous Processor With High-Speed Decision Tree Scheduler
Publication Date: 2025.02.27
  • US20250068462A1 patent drawing
  • US20250068462A1 patent drawing

AI summary

A scheduling system for heterogeneous processors having similar cores grouped by clusters employs a differentiable decision tree having nodes operating on multiple feature values indicating a current runtime state of the processor. By implementing the scheduling with a trained decision tree, extremely fast scheduling decisions can be made.