Dual-Substrate Decoder Circuit for Fast Low-Voltage Grayscale Selection
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Solution Overview
Problem
Conventional decoder circuits for TFT liquid crystal displays face issues with slow response times when selecting lower analog grayscale voltages, leading to potential display faults such as bright or dark lines and irregular colors due to reduced current flow and increased selection time.
Innovation Solution
The introduction of a second selection circuit with n-channel metal-oxide-semiconductor (NMOS) transistors operating in a substrate biased at a lower potential, in conjunction with the existing p-channel metal-oxide-semiconductor (PMOS) transistors, allows for quicker propagation of both high and low grayscale voltages by compensating for the reduced current flow at lower voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PMOS transistors are used in a conventional decoder circuit, then the circuit can select from multiple analog grayscale voltages, but the response time becomes unacceptably long when selecting lower voltage levels due to reduced current flow
Solution Approach 1:
The decoder circuit is segmented into two separate selection circuits: a first selection circuit using PMOS transistors for selecting higher grayscale voltages, and a second selection circuit using NMOS transistors for selecting lower grayscale voltages. This segmentation allows each circuit to be optimized for its specific voltage range, with the NMOS circuit providing the necessary current drive for low-voltage selections that PMOS cannot deliver quickly enough.
Solution Approach 2:
The invention changes the substrate bias parameter for the NMOS transistors in the second selection circuit, biasing the substrate at a potential lower than the minimum grayscale voltage. This parameter change ensures adequate current flow and maintains fast response times when selecting lower grayscale voltages, overcoming the fundamental limitation of PMOS-only circuits.
2Speed
If the substrate potential is lowered to improve current flow for low voltage selection, then response time improves, but device complexity increases due to dual substrate biasing requirements
Solution Approach 1:
The invention merges the PMOS-based first selection circuit and the NMOS-based second selection circuit into a single integrated decoder circuit. Both circuits share common input terminals for receiving digital input signals and common output terminals for providing selected grayscale voltages. This merging allows the circuit to handle the entire grayscale voltage range with unified input/output interfaces while maintaining the specialized advantages of each transistor type.
Solution Approach 2:
The dual circuit configuration provides multi-functionality: the first selection circuit handles higher voltage selections while the second selection circuit handles lower voltage selections. The circuit universally covers the complete grayscale range by selecting which sub-circuit is active based on the input digital signals, making the decoder capable of handling all voltage levels efficiently.
Data Source
AI summary
A decoder circuit that selects a grayscale voltage responsive to digital input includes a first transistor circuit that selects grayscale voltages greater than a certain voltage and a second transistor circuit that selects grayscale voltages less than the certain voltage. The two transistor circuits are formed in separate substrates, one substrate being a well formed in the other substrate, or both substrates being wells formed in a third substrate. The substrate of the first transistor circuit is biased at a higher potential than the substrate of the second transistor circuit. This biasing scheme enables all selected grayscale voltages to propagate quickly through the decoder circuit.