Image Processing Device Decoder Circuit Parallel Pixel Grouping

The patent divides pixels into multiple groups (first group, second group, third group, etc.) and processes them in parallel through multiple stages. The encoder circuit segments the pixel processing into independent groups that can be handled simultaneously, while the decoder circuit segments reconstruction into parallel stages. This segmentation enables the system to handle increased data bandwidth without proportionally increasing processing time, thus resolving the contradiction between data transmission capacity and processing speed.

The patent extracts the prediction data generation function into a separate, reusable component that can be shared across multiple processing stages. The first stage generates prediction data that is then extracted and utilized by subsequent stages (second stage, third stage, etc.) without requiring duplicate generation logic. This extraction approach enables parallel processing of multiple pixel groups while avoiding the complexity of implementing identical processing circuits for each parallel path, thus improving processing speed without proportionally increasing device complexity.