Decoder Output Compression for Memory-Efficient Non-Binary Decoding
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Solution Overview
Problem
Existing data decoding systems require large storage circuits and consume significant semiconductor area and power, especially when handling large codewords with non-binary decoding, which involves symbols with multiple possible values and associated probability values.
Innovation Solution
The implementation of a data processing system that includes a data decoder circuit capable of applying a decoding algorithm, compressing and decompressing outputs, and normalizing and scaling probability values, using techniques like low density parity check algorithms and maximum a posteriori data detection, to reduce memory requirements and improve efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the data decoding circuit stores an entire codeword including parity bits, then the decoding process can be completed, but large storage circuits are required which consume both semiconductor area and power
Solution Approach 1:
The patent extracts and processes only the necessary portions of the codeword (information bits and selected parity bits) rather than storing the entire codeword. The decoding circuit processes data in segments, extracting required probability values and syndrome calculations on-demand, thereby reducing storage requirements while maintaining decoding accuracy.
Solution Approach 2:
The codeword processing is divided into segments - the patent processes information bits and parity bits separately through multiple decoding iterations. The syndrome calculation and probability value processing are performed in discrete steps, allowing the circuit to handle large codewords without requiring proportional storage capacity.
2Measurement precision
If non-binary decoding is performed where each symbol has multiple possible values with probability values, then more accurate decoding is achieved, but storage demands and power consumption are significantly increased
Solution Approach 1:
The patent applies local quality by processing probability values differently based on their significance. Not all probability values are stored or processed with equal detail - the circuit focuses computational resources on the most probable symbols and uses approximate calculations for less critical values, reducing overall power consumption while maintaining decoding precision where it matters most.
Solution Approach 2:
The patent dynamically adjusts processing parameters during decoding iterations. Probability value precision and processing depth are modified based on the decoding stage and symbol confidence levels, allowing the circuit to achieve high precision when needed while conserving power during routine processing operations.
3Measurement precision
If non-binary decoding is performed with multiple probability values per symbol, then better decoding accuracy is achieved, but storage circuit size increases
Solution Approach 1:
The patent extracts only the essential probability information needed for accurate decoding rather than storing complete probability distributions for all possible symbol values. By identifying and processing only the most relevant probability values (such as the highest probability and selected lower probabilities), the circuit achieves high decoding accuracy with reduced storage requirements.
Solution Approach 2:
The patent implements partial action by processing a subset of probability values rather than all possible values for each symbol. The circuit calculates and stores only the necessary number of probability values required to achieve the target decoding accuracy, avoiding the excessive storage that would be required to maintain complete probability information for all symbols.
Data Source
AI summary
Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a data decoder circuit. The data decoder circuit is operable to: apply a decoding algorithm to a decoder input on a first decoder iteration to yield a first decoder output; compress an output derived from the first decoder output to yield a compressed decoder output; de-compress the compressed decoder output to yield a second decoder output; and apply the decoding algorithm to the second decoder output to yield a third decoder output.