Decoder Architecture Segmentation for Multi-Standard Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing data processing technologies face inefficiencies in decoding operations due to the need to accommodate multiple encoding standards like MPEG-2, MPEG-4, and Windows Media-9, which requires complex logic design and processing.
Innovation Solution
A decoder architecture that separates tasks between a hardware accelerator and a programmable element, where the hardware accelerator performs common core operations across standards, and the programmable element handles specific operations for each standard, allowing for faster execution and adaptability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a decoder is designed to process multiple encoding standards (MPEG-2, MPEG-4, Windows Media-9), then the decoder's adaptability and versatility are improved, but the device complexity and logic design become more complex
Solution Approach 1:
The decoder is segmented into two distinct components: a hardware accelerator that handles common core operations across all standards, and a programmable element that handles standard-specific operations. This segmentation allows the system to maintain high adaptability while reducing overall complexity by separating universal functions from specialized functions.
Solution Approach 2:
The hardware accelerator is designed as a universal component that can perform core decoding operations for multiple encoding standards. By implementing multi-functional hardware logic that works across MPEG-2, MPEG-4, and Windows Media-9, the system avoids redundant logic design while maintaining broad adaptability.
2Adaptability or versatility
If complex logic is used to accommodate multiple encoding standards, then the decoder can process various standards, but the processing speed and execution time are reduced
Solution Approach 1:
By segmenting the decoder into hardware accelerator and programmable element, the time-consuming standard-specific operations are isolated to the programmable element, while the hardware accelerator continuously executes optimized core operations at high speed. This segmentation prevents complexity from bottlenecking the overall processing speed.
Solution Approach 2:
The patent replaces complex software-based logic processing with hardware acceleration for core operations. By substituting mechanical/software logic with dedicated hardware circuits for universal decoding functions, the system achieves faster execution while maintaining multi-standard capability through the programmable element.
3Reliability
If dedicated logic is implemented for each encoding standard, then the decoder can accurately process each standard, but the device complexity and resource requirements increase
Solution Approach 1:
The decoder logic is segmented such that standard-specific operations are isolated in the programmable element, while the hardware accelerator contains only the universal core logic. This segmentation maintains reliable standard-specific decoding through the programmable element while keeping the overall logic structure more manageable and less complex.
Solution Approach 2:
The standard-specific decoding logic is extracted from the main hardware accelerator and placed in the programmable element. This extraction allows the hardware accelerator to remain relatively simple and universal, while the programmable element handles the complexity of standard-specific operations, reducing the overall device complexity.
Data Source
AI summary
An apparatus includes a decoder to receive a compressed bit stream that is based on a coding standard. The decoder includes a hardware accelerator to decode a part of the compressed bit stream that is based on an operation that is common across multiple coding standards that includes the coding standard. The decoder also includes a programmable element to decode a part of the compressed bit stream that is based on an operation that is specific to the coding standard.