Decoder Threshold Control for Faster Iterative Bit Flipping
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Solution Overview
Problem
Existing memory devices, particularly NAND type memories, face challenges in improving decoding performance and reducing decoding time due to the monotonically decreasing flipping threshold during iterative decoding processes.
Innovation Solution
A decoder system with a first and second processing circuit, a processor, and a bit flipping circuit that dynamically updates the flipping threshold based on the changing state of the check expression weight and energy of the codeword in each iteration, allowing for more reasonable threshold settings and improved decoding efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a monotonically decreasing flipping threshold is used during iterative decoding, then the decoding process is simple to implement, but the decoding performance is limited and decoding time increases
Solution Approach 1:
The patent applies the dynamics principle by transitioning from a static monotonically decreasing flipping threshold to a dynamic threshold adjustment mechanism. The flipping threshold is updated based on the changing state of check expression weights during iterative decoding, allowing the system to adaptively optimize decoding performance while managing decoding time efficiently
Solution Approach 2:
The patent implements feedback by monitoring the check expression weight state during decoding iterations and using this information to adjust the flipping threshold. The processor observes whether check expression weights are increasing or decreasing and相应地 adjusts the threshold to optimize decoding performance, creating a closed-loop control system
2Reliability
If the flipping threshold is adjusted dynamically based on check expression weight state, then decoding performance is enhanced, but the system complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the decoding system into distinct functional modules: a first processing circuit for initial decoding operations, a second processing circuit for energy calculation, a processor for threshold determination based on weight state analysis, and a bit flipping circuit for threshold-based bit adjustments. This modular architecture manages complexity while enabling dynamic threshold adjustment
Solution Approach 2:
The patent implements parameter changes by modifying the flipping threshold parameter based on the state of check expression weights. The system changes the threshold parameter dynamically during decoding iterations, adjusting it according to whether weights are increasing or decreasing, thereby optimizing decoding performance without requiring fundamental system redesign
Data Source
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AI summary
In an example, a decoder comprises a first processing circuit configured to: obtain a check expression and a check expression weight based on a codeword to be decoded in a current iteration and a check matrix; a second processing circuit configured to: obtain energy of the codeword to be decoded in the current iteration based on the check matrix, the check expression, and a flipping state of the codeword to be decoded in the current iteration; a processor configured to: determine a flipping threshold in the current iteration based on a changing state of the check expression weight; and a bit flipping circuit configured to: output a codeword to be decoded in a next iteration based on a comparison result of the energy of the codeword to be decoded in the current iteration and the flipping threshold in the current iteration determined by the processor