Convolutional Decoder Traceback for Faster Reliable Viterbi Decoding
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Solution Overview
Problem
Current convolutional decoders in radio communication systems, such as those used in LTE systems, face challenges in achieving high reliability and efficient operation speed for decoding convolutional codes, particularly in correcting errors in the Physical Downlink Control Channel (PDCCH) due to limitations in the Viterbi decoding algorithm.
Innovation Solution
A convolutional decoder is designed with a branch metric processor, an Add-Compare-Select (ACS) processor, and trace back logic, utilizing first and second storage units to determine and update maximum likelihood path metrics and selectively trace back survival paths, enhancing the reliability and speed of decoding convolutional codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Viterbi decoding algorithm is used to decode PDCCH, then error correction capability is improved, but decoding operation speed deteriorates
Solution Approach 1:
The patent segments the decoding process into distinct functional modules: a branch metric processor that calculates branch metrics for state transitions, an ACS processor that performs add-compare-select operations to determine survival paths, and a traceback logic that reconstructs the decoded sequence. This segmentation allows each module to be optimized independently, improving overall decoding speed while maintaining error correction capability.
Solution Approach 2:
The patent implements preliminary action by pre-calculating and storing branch metrics for all possible state transitions in a branch metric table before the actual decoding process. The ACS processor then performs rapid lookups and comparisons using these pre-computed values, significantly reducing the computational time required during real-time decoding operations while maintaining the reliability of the Viterbi algorithm.
2Measurement precision
If multiple training operations are performed in the Viterbi decoding algorithm, then decoding accuracy is improved, but processing time increases
Solution Approach 1:
The patent extracts the training operations from the main decoding flow and performs them as separate, optimized preprocessing steps. The branch metric processor computes all necessary branch metrics in advance and stores them in lookup tables, allowing the ACS processor to focus solely on the critical add-compare-select operations without redundant calculations. This extraction maintains decoding accuracy while significantly reducing processing time.
3Reliability
If the trace back operation is performed to determine decoded bit streams, then decoding reliability is improved, but operation complexity increases
Solution Approach 1:
The patent implements dynamic traceback logic that adaptively determines the traceback depth and range based on the current state and path metrics. Rather than performing a fixed-depth traceback for all decoding scenarios, the system dynamically adjusts the traceback operation to only examine necessary previous states, reducing computational complexity while maintaining decoding reliability through selective path reconstruction.
Data Source
AI summary
A convolutional decoder includes a first storage, a second storage, a branch metric processor to determine branch metrics for transitions of states from a start step to a last step according to input bit streams, an ACS processor to select maximum likelihood path metrics to determine a survival path according to the branch metrics and to update states of the start step to the first storage and the second storage alternately based on the selection of the maximum likelihood path metrics, and a trace back logic to selectively trace back the survival path based on the states of the start step stored in a selected storage among the first storage and the second storage.