Decoder Unit for Texture Decompression with Segmented Parallel Processing

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Solution Overview

Problem

Existing graphics systems face high hardware requirements and inefficiencies when decoding multiple texels in parallel, as they often necessitate large circuitry areas to achieve desired performance levels, particularly in block-based texture compression schemes.

Innovation Solution

A decoder unit is configured with two sets of decoders: one set to decode multiple texels from a single block, and another set to decode fewer texels, along with control logic to allocate blocks of encoded texture data based on texel requests, optimizing hardware efficiency without commensurate increases in size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple decoders operate in parallel to decode multiple texels simultaneously, then decoding performance is improved, but hardware requirements and circuitry area increase significantly

Engineering Contradiction:
Improvedecoding performanceVSAvoidcircuitry area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The invention segments the decoding task by dividing texel requests into multiple categories (first plurality, second plurality, third plurality) with different priorities and characteristics. Different decoder types (first set, second set, third set) are assigned to handle different segments, allowing the system to achieve high parallel throughput without requiring all decoders to operate at full capacity simultaneously, thus reducing overall circuitry area while maintaining decoding performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control logic dynamically allocates encoded texture data blocks to appropriate decoder sets based on real-time texel request characteristics. The system adapts the number and type of active decoders according to the specific decoding needs, enabling variable parallelism that matches actual workload requirements rather than maintaining fixed maximum capacity, thereby optimizing the performance-to-area ratio.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If a single decoder type handles all texel decoding tasks, then hardware design is simplified, but decoding performance and flexibility are reduced

Engineering Contradiction:
Improvedecoder architectureVSAvoiddecoding throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The invention creates a universal decoder architecture where multiple decoder types (first, second, and third sets) can handle different categories of texel requests. Each decoder type is designed with specific capabilities optimized for its target workload, yet all can operate within the same control framework. This multi-functional approach allows the system to achieve high decoding throughput for diverse request types while maintaining a unified, manageable architecture through the centralized control logic.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If more decoders are allocated to handle complex texel requests, then decoding accuracy and completeness are improved, but hardware resource consumption increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidhardware resources
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The invention applies local quality by assigning specific decoder types to specific texel request categories based on their characteristics. The first set of decoders handles the first plurality of texels with specific properties, the second set handles the second plurality with different properties, and the third set handles the third plurality. This localized optimization ensures that each decoder type is appropriately matched to its workload, achieving high decoding accuracy for each category without over-provisioning hardware resources across the entire system.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11544892B2Decoder unit for texture decompression
Publication Date: 2023.01.03 IMAGINATION TECH LTD
  • US11544892B2 patent drawing
  • US11544892B2 patent drawing
  • US11544892B2 patent drawing

AI summary

A decoder unit is configured to decode a plurality of texels in accordance with a texel request, the plurality of texels being encoded across one or more blocks of encoded texture data each encoding a block of texels, and includes a first set of one or more decoders, each of the first set of decoders being configured to decode n texels from a single received block of encoded texture data; a second set of or more decoders, each of the second set of decoders being configured to decode p texels from a single received block of encoded texture data, where p<n; and control logic configured to allocate blocks of encoded texture data to the decoders in accordance with the texel request.