Decompression Cache Architecture for Large Match Offsets

Solution Overview

Problem

Existing decompression algorithms are limited by memory depth, which restricts the support for large match offsets, leading to inefficiencies in compression ratios and increased latency when accessing large external memories.

Innovation Solution

A decompression apparatus utilizing a cache memory and a decoder that checks match offsets against a threshold to determine if the past occurrence is cached, fetching from external memory only when necessary, thereby supporting large match offsets while minimizing latency and throughput degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a large external memory is used to support large match offsets, then the compression ratio is improved, but the access latency and throughput degradation increase

Engineering Contradiction:

Improvematch offset supportVSAvoidaccess latency

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The memory system is segmented into two parts: a small, fast cache memory (e.g., 64KB SRAM) and a large, slower external memory (e.g., 4GB DRAM). The cache stores recently decompressed data that is likely to be referenced by match offsets, while the external memory provides the full storage capacity needed for large offset support. This segmentation allows the system to achieve both large match offset capability and fast access for common cases.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different memory regions are assigned different access characteristics. The cache memory provides high-speed local access for frequently referenced data, while the external memory provides large-capacity storage for less frequently accessed data. By making the memory hierarchy non-uniform in terms of speed and capacity, the system optimizes overall performance by placing the right data in the right memory location.

Inventive Principle:

Principle #3Local quality

2Adaptability or versatility

If a large external memory is used to support large match offsets, then the compression ratio is improved, but the power consumption increases

Engineering Contradiction:

Improvematch offset supportVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The memory system is segmented into two parts: a small, fast cache memory (e.g., 64KB SRAM) and a large, slower external memory (e.g., 4GB DRAM). The cache stores recently decompressed data that is likely to be referenced by match offsets, while the external memory provides the full storage capacity needed for large offset support. This segmentation allows the system to achieve both large match offset capability and fast access for common cases.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different memory regions are assigned different access characteristics. The cache memory provides high-speed local access for frequently referenced data, while the external memory provides large-capacity storage for less frequently accessed data. By making the memory hierarchy non-uniform in terms of speed and capacity, the system optimizes overall performance by placing the right data in the right memory location.

Inventive Principle:

Principle #3Local quality

3Speed

If a small cache memory is used, then the access latency is reduced, but the support for large match offsets is limited

Engineering Contradiction:

Improveaccess speedVSAvoidmatch offset range

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The memory system is segmented into two parts: a small, fast cache memory (e.g., 64KB SRAM) and a large, slower external memory (e.g., 4GB DRAM). The cache stores recently decompressed data that is likely to be referenced by match offsets, while the external memory provides the full storage capacity needed for large offset support. This segmentation allows the system to achieve both large match offset capability and fast access for common cases.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system proactively writes decompressed output data to both the cache memory and external memory simultaneously. This preliminary action ensures that when a match reference is needed, the data is already available in the appropriate memory location, eliminating the need for additional fetch operations and reducing access latency.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20250238369A1Decompression Engine Supporting Large Match Offsets using External Memory

Publication Date: 2025.07.24 MELLANOX TECHNOLOGIES LTD(IL)

AI summary

A decompression apparatus includes a cache memory and a decoder. The decoder is to receive a compressed input data stream including literals and matches. Each literal represents a data value, and each match represents a respective sequence of literals by a respective offset pointing to a respective past occurrence of the sequence of literals. The decoder is to decompress the input data stream by replacing each match with the corresponding past occurrence, so as to produce an output data stream. In replacing a given match with the corresponding past occurrence, the decoder is to (i) when the offset indicates that the past occurrence is cached in the cache memory, retrieve the past occurrence from the cache memory, and (ii) when the offset indicates that the past occurrence is not contained in the cache memory, fetch the past occurrence from an external memory.