Decorated Storage Operations for Atomic Counter Updates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In multiple processor or multiple core data processing systems, conventional atomic update mechanisms such as software semaphores or locks cause system delays due to resource consumption and inefficient access to counters, especially when multiple cores attempt to update the same counter simultaneously.
Innovation Solution
A data processing system that includes a processor and a target device connected via a system interconnect, where the processor determines a decoration value for an instruction, which is transmitted along with a translated address to the target device, enabling the target device to perform decorated storage operations while enforcing access permissions based on the decoration value, allowing for atomic operations without relying on local permissions checking by the processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional atomic update mechanisms such as software semaphores or locks are used, then atomic operations can be performed, but system delays increase and performance degrades
Solution Approach 1:
The patent replaces software-based atomic update mechanisms (semaphores, locks) with hardware-based mechanisms. The target device performs atomic operations using hardware circuits that execute decorated storage operations, eliminating the need for software locking protocols and reducing system delays while maintaining atomic operation correctness
Solution Approach 2:
The patent introduces a target device as an intermediary between the processor and the counter. This target device receives decorated storage operations from the processor and performs the actual atomic updates, allowing the processor to offload atomic operation execution and reduce the overhead associated with software-based atomic mechanisms
2Reliability
If lock variables are used to limit access to counters, then atomic updates can be ensured, but processing cycles are significantly consumed
Solution Approach 1:
The patent replaces software lock variable mechanisms with hardware-based access control in the target device. The target device uses hardware circuits to manage counter access and perform atomic updates, eliminating the need for processors to execute lock acquisition and release instructions, thereby significantly improving processing cycle efficiency
Solution Approach 2:
The target device is designed to autonomously manage counter access and perform atomic operations without requiring processor intervention for lock management. The decorated storage operations include all necessary information for the target device to self-manage the atomic operation, eliminating the need for processor-based lock variables and improving productivity
3Loss of time
If statistics accelerators are used to reduce system delays, then update speed improves, but insufficient information can be sent in a single transaction to describe atomic operations
Solution Approach 1:
The patent merges multiple pieces of information (operation type, address, decoration value, permissions) into a single decorated storage operation transaction. This consolidated transaction contains all necessary information for the target device to perform the complete atomic operation, eliminating the need for multiple transactions and reducing update delays while maintaining transaction simplicity
Data Source
AI summary
A data processing system having a processor and a target device processes decorated instructions (i.e. an instruction having a decoration value). A device of the data processing system such as the processor sends transactions to the target device over a system interconnect. The transactions include an indication of an instruction operation, an address associated with the instruction operation, a decoration value (i.e. a command to the target device to perform a function in addition to a primary function of the executed instruction), and access permissions associated with the address. The target device (e.g. a memory with functionality in addition to storage functionality) determines whether a decoration operation specified by the decoration value is permissible based on the received access permissions. The target device performs the decoration operation if appropriate permissions exist.


