Decoupled Access-Execute Processing for Memory Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in processor design is scaling the instruction window and managing speculation depth, as larger instruction windows lead to increased parallelism but are complex to construct, and memory access latency issues, such as cache misses, reduce overall performance by stalling instructions and consuming resources.
Innovation Solution
A data processing apparatus with issue circuitry that prioritizes instruction execution by separating instructions into 'access' and 'execute' types, using a decoupled access buffer to store data values from access instructions and allow execute instructions to retrieve them when needed, thereby reducing the impact of memory access latency and improving instruction execution progress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the instruction window is enlarged to increase speculation depth and instruction-level parallelism, then the processor can achieve higher parallelism, but the device complexity increases significantly
Solution Approach 1:
The patent segments instructions into two distinct types: access instructions (load/store) and execute instructions (arithmetic/logic). This segmentation allows each type to be handled by dedicated execution circuitry, reducing the complexity of managing a large unified instruction window while still enabling high instruction-level parallelism through independent processing of access and execute instructions.
2Reliability
If cache misses occur during instruction execution, then memory access latency increases, but this reduces overall processor performance and effective speculation depth
Solution Approach 1:
The patent implements preliminary action by allowing access instructions to be executed in advance of when their data is actually needed by execute instructions. The decoupled access buffer stores results of access instructions before execute instructions are ready to consume them, enabling the processor to proceed with speculative execution without waiting for memory accesses to complete, thus maintaining effective speculation depth despite cache misses.
Solution Approach 2:
The decoupled access buffer acts as an intermediary between access instruction execution and execute instruction consumption. It decouples the timing of data production from data consumption, allowing access instructions to complete independently and store results in the buffer, while execute instructions retrieve data from the buffer when ready, eliminating stalls caused by memory access latency.
3Reliability
If access instructions wait for memory access completion before executing dependent instructions, then data correctness is ensured, but instruction execution progress is reduced
Solution Approach 1:
The patent enables access instructions to execute in advance (preliminary action) before execute instructions that depend on their results are ready. The decoupled access buffer stores the results of access instructions before they are consumed by execute instructions, ensuring data correctness is maintained while allowing maximum instruction execution progress through speculative execution.
Data Source
AI summary
An apparatus comprises first instruction execution circuitry, second instruction execution circuitry, and a decoupled access buffer. Instructions of an ordered sequence of instructions are issued to one of the first and second instruction execution circuitry for execution in dependence on whether the instruction has a first type label or a second type label. An instruction with the first type label is an access-related instruction which determines at least one characteristic of a load operation to retrieve a data value from a memory address. Instruction execution by the first instruction execution circuitry of instructions having the first type label is prioritised over instruction execution by the second instruction execution circuitry of instructions having the second type label. Data values retrieved from memory as a result of execution of the first type instructions are stored in the decoupled access buffer.