Decoupled CABAC Decoding for Variable-Time Video Pipelines

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Solution Overview

Problem

The challenge of implementing a context-adaptive binary arithmetic coding (CABAC) decoder in a pipelined architecture is the variable decoding time due to the variable number of binary symbols, leading to pipeline stalls and increased memory requirements when decoupled from the main video decoding pipeline.

Innovation Solution

Decoupling the CABAC engine from the main video decoding pipeline and using buffer memory to allow load averaging over multiple coding blocks, reducing memory size and bandwidth requirements by employing a binarization scheme that preprocesses syntax elements into bins, and splitting the entropy decoder into stages to optimize processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If CABAC decoding is performed in a pipelined architecture with variable number of binary symbols, then compression efficiency is improved, but pipeline stalls occur due to variable decoding time

Engineering Contradiction:
Improvecompression efficiencyVSAvoidpipeline stalls
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The CABAC decoder is divided into multiple independent pipeline stages: arithmetic decoding stage, inverse binarization stage, and syntax element parsing stage. Each stage processes a portion of the decoding task independently, allowing parallel processing and eliminating pipeline stalls caused by variable decoding times. The binarization results are pre-computed and stored in separate memory structures, enabling the arithmetic decoding stage to operate independently without waiting for subsequent stages.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If CABAC engine is decoupled from main video decoding pipeline, then processing flexibility is improved, but memory size and bandwidth requirements increase

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidmemory size and bandwidth
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The binarization process is performed in advance during the arithmetic decoding stage, and the results are stored in pre-allocated memory structures. This preliminary action eliminates the need for dynamic memory allocation and reduces memory bandwidth requirements during the main decoding pipeline operation. The syntax element parsing stage then operates on these pre-computed binarization results without requiring additional memory access.

Inventive Principle:
Principle #10Preliminary action

3Speed

If binarization is performed before arithmetic decoding, then decoding speed is improved, but memory bandwidth requirements increase

Engineering Contradiction:
Improvedecoding speedVSAvoidmemory bandwidth
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent reorganizes the memory structure to store binarization results in a two-dimensional array format that optimizes memory access patterns. The binarization results are arranged by syntax element type rather than by processing order, allowing the arithmetic decoding stage to access only the required binarization data for each syntax element without traversing the entire memory structure. This dimensional reorganization reduces memory bandwidth requirements while maintaining decoding speed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12425619B2CABAC decoder with decoupled arithmetic decoding and inverse binarization
Publication Date: 2025.09.23 TEXAS INSTRUMENTS INC
  • US12425619B2 patent drawing
  • US12425619B2 patent drawing
  • US12425619B2 patent drawing

AI summary

An encoded bitstream of entropy encoded video data is received by a video decoder. The encoded bitstream represents syntax elements of a sequence of coding blocks. The sequence of coding blocks is recovered by processing a bin sequences associated with each coding block in a processing pipeline, wherein a defined amount of time is allocated to process each coding block in the processing pipeline. The encoded bitstream is arithmetically decoded to produce each bin sequence. The arithmetic decoder is time-wise decoupled from the processing pipeline by storing a plurality of the bin sequences in a buffer memory.