Dedicated Core Managing External Memory Access

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Solution Overview

Problem

In many core processors, shared external memory can lead to interference between applications during read and write operations, which can result in performance issues and reliability concerns due to the small size of internal shared memories and the need for external memory access.

Innovation Solution

A processor architecture where dedicated cores manage temporal and spatial organization of external memory access, preventing interference by synchronizing read and write operations and ensuring non-interference between applications through predefined programming interfaces and a common clock, allowing applications to access external memory without conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple applications simultaneously access external memory in many core processors, then memory capacity is sufficient for all applications, but interference between applications occurs during read and write operations

Engineering Contradiction:
Improvememory capacityVSAvoidapplication reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A dedicated memory management core is introduced as an intermediary between applications and external memory. This core acts as a mediator that receives memory access requests from multiple applications, manages the access queue, and coordinates read/write operations to prevent interference while maintaining simultaneous access capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory management function is segmented from the application cores and assigned to a dedicated memory management core. This segmentation separates the control plane (memory management) from the data plane (application execution), allowing independent optimization of each function and preventing application-level interference in memory access.

Inventive Principle:
Principle #1Segmentation

2Speed

If internal shared memory size is increased to reduce external memory access, then access speed improves, but internal memory size becomes insufficient for large data sets

Engineering Contradiction:
Improvememory access speedVSAvoidmemory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The memory hierarchy is organized with internal shared memory nested within each computation group, while external memory serves as a larger nested layer accessible by multiple computation groups. The dedicated memory management core coordinates access between these nested memory layers, allowing fast access to frequently used data in internal memory while providing access to larger data sets in external memory.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Device complexity

If multiple cores share external memory without dedicated management, then device complexity is reduced, but interference between simultaneous read and write operations occurs

Engineering Contradiction:
Improvememory management complexityVSAvoidmemory access interference
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The dedicated memory management core serves as an intermediary that absorbs the complexity of coordinating multiple memory access requests. It implements access arbitration, queue management, and synchronization logic, isolating the complexity from individual application cores while preventing harmful interference between simultaneous operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10691486B2Processor comprising a plurality of computation cores
Publication Date: 2020.06.23 AIRBUS OPERATIONS (SAS)
  • US10691486B2 patent drawing
  • US10691486B2 patent drawing

AI summary

A processor including computation groups, each computation group including computation cores, the processor being capable of simultaneously implementing a plurality of applications, each application being implemented by a computation core and possibly requiring a read-mode or write-mode access to an external memory connected to the processor. At least one core, called dedicated core, of at least one computation group is dedicated to management of the external memory, the management making it possible to temporally and spatially organize read-mode and write-mode accesses to the external memory of each application requiring a read or a write in the external memory implemented by the processor.