Dedicated Commands for Resistance Variable Memory Refresh
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Resistance variable memory cells in memory systems face issues due to resistance drift over time, leading to erroneous readings and increased power consumption and data bus bandwidth usage when writing or refreshing cells, as existing methods require transferring host data for common resistance state changes.
Innovation Solution
Implementing dedicated commands within the memory system to write or refresh groups of resistance variable memory cells to a common resistance state or data value without receiving host data from the external controller, reducing power consumption and preserving data bus width by performing these operations internally.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If host data is transferred from external controller to memory system for writing or refreshing memory cells, then the memory cells can be updated to desired states, but power consumption and data bus bandwidth usage increase
Solution Approach 1:
The patent extracts the unnecessary data transfer operation from the memory refresh process. By implementing a dedicated refresh command that operates independently of host data transfer, the system eliminates the redundant step of transferring host data solely for refreshing purposes, thereby reducing power consumption while maintaining memory cell reliability
Solution Approach 2:
The memory system implements a universal command interface where a single dedicated refresh command can serve multiple functions: refreshing memory cells, managing resistance states, and maintaining data integrity without requiring separate data transfer operations. This multi-functionality reduces overall power consumption by consolidating operations
2Reliability
If host data is transferred for writing or refreshing memory cells, then memory operations can be performed, but data bus bandwidth is consumed
Solution Approach 1:
The patent removes the unnecessary host data transfer component from the memory refresh operation. By using a dedicated refresh command that directly addresses memory cells without requiring host data to be placed on the data bus, the system maintains data accuracy while preserving data bus bandwidth for actual data transfer operations
Solution Approach 2:
The memory system performs self-service refresh operations using dedicated commands that manage memory cell states internally without external host data intervention. This self-service capability allows the memory system to maintain data integrity autonomously, reducing unnecessary data bus traffic
3Productivity
If resistance variable memory cells are written in place without erasing, then write speed is improved, but resistance drift causes erroneous sensing
Solution Approach 1:
The patent applies preliminary action by periodically refreshing memory cells before resistance drift causes erroneous sensing. The dedicated refresh command proactively maintains memory cells in their desired resistance states, preventing drift-related errors before they occur, thus preserving both write speed and sensing accuracy
Solution Approach 2:
The memory system implements feedback through periodic refresh operations that monitor and correct resistance drift in memory cells. By using dedicated refresh commands to continuously maintain cells in their intended states, the system compensates for natural resistance drift, ensuring accurate sensing while maintaining the benefits of write-in-place operations
Data Source
AI summary
An apparatus can have a memory comprising an array of resistance variable memory cells and a controller. The controller can be configured to receive to a dedicated command to write all cells in a number of groups of the resistance variable memory cells to a first state without transferring any host data corresponding to the first state to the number of groups. The controller can be configured to, in response to the dedicated command, perform a read operation on each respective group to determine states of the cells in each respective group, determine from the read operation any cells in each respective group programmed to a second state, and write only the cells determined to be in the second state to the first state.