Deep Channel Stopper Region for Edge Termination Reliability
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Solution Overview
Problem
Vertical power semiconductor components face challenges in maintaining high blocking capability due to reduced electric field control along side surfaces, leading to lower reliability of edge termination structures and increased susceptibility to external charges and corrosion.
Innovation Solution
A method for producing semiconductor components with deep channel stopper regions formed by extending dopant regions from the front side into the semiconductor body, using photolithography and high-temperature treatments to achieve a high vertical extent with minimal lateral width, thereby reducing field spikes and enhancing blocking capability and robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If channel stopper regions are formed with conventional depth, then manufacturing is simpler, but blocking capability and reliability are reduced due to field spikes and charge accumulation at interfaces
Solution Approach 1:
The channel stopper region is formed early in the manufacturing process, before other doped regions, allowing the use of higher temperature budgets for dopant diffusion without affecting subsequent doping steps. This preliminary formation enables deeper channel stopper regions that effectively suppress field spikes and charge accumulation, thereby improving blocking capability and reliability
Solution Approach 2:
The patent utilizes higher temperature budgets during the channel stopper region formation to achieve deeper dopant diffusion. By increasing the thermal energy parameter, the dopants diffuse deeper into the semiconductor body, creating channel stopper regions with greater vertical extent that effectively eliminate field spikes and improve blocking capability
2Length of moving object
If higher temperature budgets are used for forming channel stopper regions, then deeper vertical extent is achieved, but other subsequently formed doped regions are adversely affected
Solution Approach 1:
The channel stopper region is formed in advance of other doped regions in the manufacturing sequence. This timing allows the use of aggressive high-temperature processing to achieve deep dopant diffusion for the channel stopper region without causing unwanted diffusion or property changes in other doped regions that will be formed later in the process
3Reliability
If channel stopper regions are formed deeply, then field spikes are reduced and blocking capability is improved, but manufacturing process complexity increases
Solution Approach 1:
By forming the channel stopper region early in the manufacturing process, the patent leverages the full temperature budget available at that stage to achieve deep dopant diffusion. This approach creates robust channel stopper regions that effectively suppress field spikes and protect against external charges, while integrating the deep formation into the existing manufacturing sequence without requiring additional complex process steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The deep channel stopper regions effectively reduce the influence of electrical charges on the edge termination structure, improving the semiconductor component's blocking capability and robustness against external charges and moisture-induced corrosion, while maintaining active area efficiency.
Implementation Method 1
The channel stopper region is formed by means of a photolithographic method
Implementation Method 2
The free temperature budget can be utilized for example for deeply indiffusing a suitable dopant
Implementation Method 3
makes it possible to use a higher temperature budget for forming the channel stopper region
Implementation Method 4
introducing a first dopant into a semiconductor substrate
Data Source
AI summary
A channel stopper region extending from a first main surface into a component layer of a first conductivity type is formed in an edge region of a component region, the edge region being adjacent to a sawing track region. Afterward, a doped region extending from the first main surface into the component layer is formed in the component region. The channel stopper region is formed by a photolithographic method that is carried out before a first photolithographic method for introducing dopants into a section of the component region outside the channel stopper region.


