Deep Learning Resist Profile Prediction for Semiconductor Lithography
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Solution Overview
Problem
Existing methods for predicting resist/etch 3D profiles are either too time-consuming due to rigorous simulations or lack accuracy as they do not simulate physical/chemical phenomena thoroughly.
Innovation Solution
A computing device using deep learning to predict resist/etch 3D profiles by sampling unique patterns, performing rigorous simulations, and generating multi-channel image-based deep learning models to reduce simulation time and enhance accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a rigorous model is used to simulate physical/chemical phenomena of photoresist, then prediction accuracy is improved, but calculation time increases significantly
Solution Approach 1:
The patent applies preliminary action by pre-training a deep learning model using rigorous simulation data obtained from a limited set of unique patterns. This pre-trained model can then rapidly predict resist profiles for full-chip verification without requiring time-consuming rigorous simulations for every pattern, thus resolving the contradiction between accuracy and calculation time.
Solution Approach 2:
The patent uses copying by creating a deep learning model that replicates the behavior of the rigorous simulation model. The model learns to copy the accurate predictions of rigorous simulations through training on sampled unique patterns, enabling fast full-chip verification that mimics the accuracy of rigorous models without the computational burden.
2Loss of time
If a compact model is used for full chip verification, then calculation time is reduced, but prediction accuracy deteriorates
Solution Approach 1:
The patent applies parameter changes by transforming the prediction approach from direct compact model simulation to deep learning-based prediction. The deep learning model is trained to predict multi-height resist profiles with accuracy comparable to rigorous models, while maintaining the fast calculation speed needed for full-chip verification, thus resolving the contradiction between speed and accuracy.
3Measurement precision
If rigorous simulation is performed on the full chip, then prediction accuracy is improved, but productivity decreases due to excessive time consumption
Solution Approach 1:
The patent applies segmentation by dividing the full-chip verification process into two stages: (1) training stage where rigorous simulations are performed on a limited set of unique patterns to build the deep learning model, and (2) verification stage where the trained model rapidly predicts profiles across the entire chip. This segmentation enables high productivity while maintaining accuracy.
Solution Approach 2:
The patent uses preliminary action by pre-training the deep learning model on unique patterns before performing full-chip verification. This preliminary training enables the model to rapidly predict profiles for the entire chip without requiring time-consuming rigorous simulations during the verification phase, thus improving productivity while maintaining accuracy.
Data Source
AI summary
An operating method of a computing device for predicting a profile using deep learning includes sampling a unique pattern in a full chip, extracting a contour of a resist profile of each of a plurality of heights by performing rigorous simulation corresponding to the unique pattern, preparing an input image and an output image corresponding to the contour of each of the plurality of heights, performing deep learning on the extracted contour using the input image and the output image, and generating a profile prediction model according to performing of the deep leaning.