Deep Packet Buffering for Ethernet Switch Bandwidth Fluctuations
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Solution Overview
Problem
Ethernet switch cores face challenges in managing momentary bandwidth variances, which can lead to packet loss, especially in environments with significant fluctuations due to weather or air interfaces, where standard flow control is insufficient.
Innovation Solution
The implementation of a deep packet buffering system in Ethernet switch cores, utilizing both on-chip and external deep packet buffers, with policy engines to determine frame destinations and manage bandwidth variance, transferring frames to external buffers only when necessary to maintain lossless operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard on-chip buffering is used in Ethernet switch cores, then device complexity is kept low and operation speed is maintained, but packet loss occurs during momentary bandwidth reductions
Solution Approach 1:
The buffering system is segmented into multiple levels: on-chip buffers for immediate packet storage and external deep packet buffers for extended storage during bandwidth fluctuations. This segmentation allows the system to maintain low complexity for normal operation while providing enhanced reliability during bandwidth reductions without requiring a completely complex buffering architecture.
2Reliability
If deep packet buffering is implemented to absorb bandwidth fluctuations, then packet loss is reduced, but device complexity and resource requirements increase
Solution Approach 1:
The buffering architecture uses a nested structure where external deep packet buffers are coupled with internal on-chip buffers. The on-chip buffers serve as a first level of buffering integrated within the switch core, while external buffers provide a second level for deeper buffering needs. This nesting allows the system to achieve lossless operation by transferring packets between buffer levels based on bandwidth conditions, without requiring a completely separate complex buffering system.
3Reliability
If momentary bandwidth reductions are absorbed by the backhaul network infrastructure, then packet loss is prevented, but the system requires significant buffering capacity that increases device complexity
Solution Approach 1:
The buffering system operates dynamically by monitoring bandwidth conditions and adaptively transferring packets between on-chip and external buffers. During momentary bandwidth reductions, the system activates deep packet buffering in external memory to absorb the fluctuations. During normal operation, packets remain in the faster on-chip buffers. This dynamic operation allows the system to provide significant buffering capacity only when needed, reducing the average buffering requirements and associated device complexity.
Data Source
AI summary
Disclosed is a method and system for deep packet buffering on a switch core comprising an ingress and egress deep packet buffer and an external deep packet buffer.