Deep Silicon Trench Etching via Segmented Sub-Steps
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Solution Overview
Problem
The deep silicon trench etching process is limited by resist reticulation on the wafer surface, leading to incomplete patterns, irregular sizes, and difficulties in removing the photoresist, which restricts the etching depth and manufacturing process efficiency.
Innovation Solution
The method involves dividing the conventional single etching step into multiple sub etching steps with dechuck processes in between, using an electrostatic chuck for wafer absorption and stabilization, and releasing static charges to prevent prolonged exposure to plasma bombardment, thereby reducing resist reticulation and static charge accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the etching process time is extended to achieve deeper etching depth, then the etching depth increases, but resist reticulation is formed on the wafer surface and photoresist is completely etched away
Solution Approach 1:
The patent divides the single long etching process into multiple sub-etching steps with intermediate dechuck and cooling periods. This segmentation allows the total etching depth to accumulate while preventing resist reticulation by periodically removing the wafer from the electrostatic chuck and exposing it to ambient air for cooling and static charge dissipation.
Solution Approach 2:
The patent implements periodic dechuck operations during the etching process. The wafer is periodically removed from the electrostatic chuck between sub-etching steps, allowing ambient air to cool the wafer surface and dissipate static charges. This periodic action prevents continuous plasma bombardment heating and resist degradation while maintaining cumulative etching depth.
2Length of stationary object
If the wafer continuously contacts the electrostatic chuck during long etching process, then the etching depth increases, but the temperature on the wafer surface increases and resist reticulation is formed
Solution Approach 1:
The continuous etching process is segmented into multiple sub-steps with intermediate cooling periods. During these cooling periods, the wafer is removed from the electrostatic chuck and exposed to ambient air, allowing heat dissipation and temperature reduction before the next etching sub-step begins.
Solution Approach 2:
The patent employs periodic dechuck operations where the wafer is rhythmically removed from the electrostatic chuck during the etching sequence. This periodic exposure to ambient air provides continuous cooling cycles, preventing excessive temperature accumulation on the wafer surface while maintaining the overall etching depth progression.
3Reliability
If SiO2 or SiN is used as the etching mask layer to replace photoresist, then the mask layer provides better protection, but the mask layer cannot be removed completely and fragments remain on the wafer surface
Solution Approach 1:
The patent uses photoresist as a disposable mask layer that can be completely removed after etching. Although photoresist has lower protection capability compared to SiO2 or SiN, the intermediate dechuck operations provide periodic cooling and static charge dissipation that prevent resist reticulation and complete photoresist removal, achieving both adequate protection and complete removability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents resist reticulation and chuck position fragments, ensures complete static charge release, and maintains wafer temperature control, enhancing the precision and efficiency of the deep silicon trench etching process.
Implementation Method 1
a, absorbing a wafer electrostatically using an electrostatic chuck
Implementation Method 2
f, connecting the wafer to the ground to release static charges
Data Source
AI summary
A method for wafer etching in a deep silicon trench etching process includes the following steps: a. electrostatically absorbing a wafer using an electrostatic chuck, and stabilizing the atmosphere required by the process (S110); b. performing the sub-steps of a main process for the wafer, and the time for the sub-steps of the main process being shorter than the time required by the wafer main process; c. releasing the electrostatic adsorption of the electrostatic chuck on the wafer; d. determining whether the cumulative time of the sub-steps of the main process reaches a predetermined threshold or not, if so, performing the step e (S150), and if not, repeating the operations in the steps a to c (S140); and e. ending a wafer manufacturing process. The etching method avoids the wafer from continuous contact with the electrostatic chuck, reduces electrostatic accumulation on the surface of the wafer, and therefore solves the problem of resist reticulation on the surface of the wafer in the DSIE process.