Deep Silicon Via Plugs for Vertical DMOS Sinker Resistance
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Solution Overview
Problem
Conventional BCD processes using diffused sinkers in integrated vertical DMOS transistors face limitations due to high on-resistance and significant silicon area consumption, making them less efficient compared to lateral devices, especially as voltage ratings increase.
Innovation Solution
The use of deep silicon via (DSV) plugs replaces diffused sinkers, reducing layout area and sinker resistance, while also enhancing thermal conductivity and isolation performance, allowing for a more compact and efficient vertical DMOS transistor design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If diffused sinkers are used in conventional BCD processes, then the vertical DMOS transistor can be fabricated with standard processes, but the on-resistance increases and silicon area is significantly consumed
Solution Approach 1:
The patent transitions from lateral diffused sinkers to vertical deep silicon via plugs, changing the dimensional approach from horizontal area consumption to vertical depth exploitation. The DSV plugs extend deep into the substrate (e.g., 6 microns deep) to achieve low resistance without consuming significant layout area (0.8×0.8 microns), effectively moving the solution into the third dimension.
Solution Approach 2:
The invention changes the geometric parameters of the sinker structure from wide and shallow (diffused sinkers with width about three times depth) to narrow and deep (DSV plugs with depth much greater than width). This parameter transformation enables the sinker to achieve lower resistance with minimal area footprint by exploiting the vertical dimension and metallic fill materials.
2Ease of manufacture
If diffused sinkers are used, then the process is compatible with conventional BCD manufacturing, but the sinker resistance is high and layout area is large
Solution Approach 1:
The patent employs composite structures by filling the deep silicon via plugs with metallic materials (such as tungsten, copper, or aluminum) instead of relying solely on diffused silicon. This composite approach combines the structural integrity of silicon with the superior electrical conductivity of metals, achieving low resistance (e.g., 60 Ohms for a 6-micron deep plug) while maintaining process compatibility with conventional BCD manufacturing.
Solution Approach 2:
The solution moves from lateral diffusion to vertical penetration, using deep silicon via plugs that extend far into the substrate. This dimensional change allows the sinker to reach the buried layer more effectively and provides a lower resistance path without increasing lateral dimensions, thereby improving reliability while maintaining manufacturing compatibility.
3Strength
If the epitaxial layer thickness is increased for higher voltage ratings, then the breakdown voltage improves, but the required sinker area and on-resistance increase
Solution Approach 1:
The patent addresses the voltage-resistance tradeoff by exploiting the vertical dimension through deep silicon via plugs. As epitaxial layer thickness increases for higher voltage ratings, the DSV plugs extend deeper to maintain effective electrical contact, preventing the on-resistance from increasing proportionally with the epitaxial thickness. This dimensional approach decouples the voltage rating improvement from the resistance penalty.
Solution Approach 2:
The invention changes the sinker geometry parameters from area-based (lateral dimensions) to depth-based (vertical dimension). By increasing the plug depth rather than the area, the solution maintains low resistance even as epitaxial thickness increases for higher voltage applications, effectively breaking the traditional scaling relationship between voltage rating and resistance.
4Ease of manufacture
If diffused sinkers are used, then the structure is simple to fabricate, but the thermal conductivity is insufficient for heat sinking
Solution Approach 1:
The patent improves thermal conductivity by filling the deep silicon via plugs with metallic materials that possess superior thermal properties compared to diffused silicon. The metallic fill (tungsten, copper, or aluminum) creates an efficient heat sinking path from the active device region to the substrate, addressing the thermal management issue while maintaining fabrication simplicity through standard semiconductor processing techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
DSV plugs significantly reduce the layout area and resistance of vertical DMOS transistors, improving isolation and heat sinking capabilities, making them more efficient and competitive with lateral devices, even with thick epitaxial silicon processes.
Implementation Method 1
The thermal conductivity of the metallic DSV plug is higher than the thermal conductivity of the monocrystalline silicon diffused sinkers of the prior art. As a result, the DSV plug of the present invention is better at sinking heat generated during normal operation of the vertical DMOS transistor.
Implementation Method 2
The DSV plugs significantly reduce the sinker resistance, even when used in combination with a thick epitaxial silicon process.
Data Source
AI summary
A vertical DMOS device implements one or more deep silicon via (DSV) plugs, thereby significantly reducing the layout area and on-resistance (RDSON) of the device. The DSV plugs extend through a semiconductor substrate to contact a conductively doped buried diffusion region, which forms the drain of the vertical DMOS device. Methods for fabricating the vertical DMOS device are compatible with conventional sub-micron VLSI processes, such that the vertical DMOS device can be readily fabricated on the same integrated circuit as CMOS devices and analog devices, such as lateral double-diffused MOS (LDMOS) devices.