Deep Sleep Power State Without Inverse Temperature Voltage Regulation
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Solution Overview
Problem
Conventional power management systems fail to efficiently manage power consumption in integrated circuits by disabling inverse temperature-dependent voltage regulation during low power states, leading to inefficiencies in power usage and performance.
Innovation Solution
Implementing a power state where inverse temperature-dependent voltage regulation is disabled, along with disabling clock signals and maintaining voltage rails within a specific range to conserve power, while allowing power management logic to operate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inverse temperature-dependent voltage regulation is enabled during low power states, then voltage stability is improved, but power consumption increases
Solution Approach 1:
The voltage regulation system dynamically adjusts its operation mode based on the power state of the processor. During active states, inverse temperature-dependent voltage regulation is enabled to maintain voltage stability. During low power states (C1-C3), the regulation is disabled to reduce power consumption, and the voltage rail is allowed to drift within acceptable ranges without active compensation for temperature changes.
Solution Approach 2:
The system changes the operational parameters of the voltage regulator based on processor power state. When transitioning to low power states, the regulator stops actively compensating for temperature-induced voltage changes, effectively changing from a closed-loop temperature-compensated mode to an open-loop mode, thereby reducing power consumption while accepting reduced voltage stability.
2Use of energy by moving object
If processor enters deep sleep state to save power, then power consumption is reduced, but wake-up time increases
Solution Approach 1:
Instead of completely disabling the voltage regulation system during deep sleep states, the invention applies partial action by maintaining minimal monitoring capabilities while disabling active temperature compensation. This allows the system to achieve significant power savings while retaining the ability to quickly restore full regulation functionality upon wake-up, reducing the effective wake-up time penalty.
Data Source
AI summary
Techniques and mechanisms for providing a power state wherein a temperature-based voltage regulation is disabled. In an embodiment, a load circuit receives one or more clock signals, and one or more supply voltages. Power management logic facilitates either one of a first power state and a second power state, each for providing power to the load circuit. The first power state enables each clock signal provided to the load circuitry, and further comprises an enabled state of a functionality to perform inverse temperature dependency voltage regulation. The second power state disables each clock signal provided to the load circuitry, and further comprises a disabled state of the functionality. In another embodiment, during the second power state, each voltage supply provided to the load circuit is regulated in a respective voltage range which enables at least some state of the load circuit to be maintained.


